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kammoun manel
kammoun manel
Postdoctoral
在 crns.rnrt.tn 的电子邮件经过验证
标题
引用次数
引用次数
年份
FPGA-based implementation of the SHA-256 hash algorithm
M Kammoun, M Elleuchi, M Abid, MS BenSaleh
2020 IEEE international conference on design & test of integrated micro …, 2020
272020
Design exploration of efficient implementation on SoC heterogeneous platform: HEVC intra prediction application
M Kammoun, A Ben Atitallah, R Ben Atitallah, N Masmoudi
International Journal of Circuit Theory and Applications 45 (12), 2243-2259, 2017
222017
An efficient implementation of GLCM algorithm in FPGA
MAB Atitallah, R Kachouri, M Kammoun, H Mnif
2018 International Conference on Internet of Things, Embedded Systems and …, 2018
172018
An FPGA comparative study of high‐level and low‐level combined designs for HEVC intra, inverse quantization, and IDCT/IDST 2D modules
A Ben Atitallah, M Kammoun, KMA Ali, R Ben Atitallah
International Journal of Circuit Theory and Applications 48 (8), 1274-1290, 2020
152020
Case study of an HEVC decoder application using high-level synthesis: intraprediction, dequantization, and inverse transform blocks
M Kammoun, AB Atitallah, KMA Ali, RB Atitallah
Journal of Electronic Imaging 28 (3), 033010-033010, 2019
152019
An optimized hardware architecture for intra prediction for HEVC
M Kammoun, AB Atitallah, N Masmoudi
International Image Processing, Applications and Systems Conference, 1-5, 2014
132014
An optimized FPGA design of inverse quantization and transform for HEVCdecoding blocks and validation in an SW/HW environment
AB Atitallah, M Kammoun, RB Atitallah
Turkish Journal of Electrical Engineering and Computer Sciences 28 (3), 1656 …, 2020
102020
HW/SW Architecture Exploration for an Efficient Implementation of the Secure Hash Algorithm SHA-256
AMO Manel Kammoun, Manel Elleuchi, Mohamed Abid
JOURNAL OF COMMUNICATIONS SOFTWARE AND SYSTEMS 17 (2), 87-96, 2021
82021
An optimized hardware architecture of 4× 4, 8× 8, 16× 16 and 32× 32 inverse transform for HEVC
M Kammoun, E Maamouri, AB Atitallah, N Masmoudi
2016 2nd International Conference on Advanced Technologies for Signal and …, 2016
72016
High-level design of HEVC intra prediction algorithm
AB Atitallah, M Kammoun
2020 5th International Conference on Advanced Technologies for Signal and …, 2020
42020
An efficient hardware architecture for interpolation filter of HEVC decoder
M Kammoun, AB Atitallah, N Masmoudi
2015 IEEE 12th International Multi-Conference on Systems, Signals & Devices …, 2015
32015
An efficient architecture VLSI for 4× 4 intra prediction in HEVC standard
M Kammoun, AB Atitallah, H Loukil, N Masmoudi
10th International Multi-Conferences on Systems, Signals & Devices 2013 …, 2013
32013
High-Level Synthesis Of Inverse Quantization And Transform Block For HEVC Decoder On FPGA
AB Atitallah, M Kammoun
International Journal of Scientific & Technology Research 9 (3), 1924-1928, 2020
2020
FPGA-based implementation of intra prediction module for HEVC decoder
ABA M. Kammoun
International Journal of Recent Technology and Engineering (IJRTE) 8 (2), 2019
2019
An Optimized Hardware Architecture of 4× 4 Intra Prediction for HEVC Standard
M Kammoun, AB Atitallah, H Loukil, N Masmoudi
Communication, Signal Processing & Information Technology: Extended Papers 8 …, 2018
2018
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