| A novel extended source TFET with δp+-SiGe layer J Talukdar, G Rawat, K Mummaneni Silicon 12 (10), 2273-2281, 2020 | 56 | 2020 |
| Dielectrically modulated single and double gate tunnel FET based biosensors for enhanced sensitivity J Talukdar, G Rawat, K Mummaneni IEEE Sensors Journal 21 (23), 26566-26573, 2021 | 37 | 2021 |
| A review on a negative capacitance field-effect transistor for low-power applications Malvika, B Choudhuri, K Mummaneni Journal of Electronic Materials 51 (3), 923-937, 2022 | 34 | 2022 |
| A non-uniform silicon TFET design with dual-material source and compressed drain J Talukdar, K Mummaneni Applied Physics A 126 (1), 81, 2020 | 34 | 2020 |
| Comparative Analysis of the Effects of Trap Charges on Single-and Double-Gate Extended-Source Tunnel FET with dp SiGe Pocket Layer J Talukdar, G Rawat, K Singh, K Mummaneni | 25 | 2020 |
| Low frequency noise analysis of single gate extended source tunnel FET J Talukdar, G Rawat, K Singh, K Mummaneni Silicon 13, 3971-3980, 2021 | 21 | 2021 |
| Device physics based analytical modeling for electrical characteristics of single gate extended source tunnel FET (SG-ESTFET) J Talukdar, G Rawat, B Choudhuri, K Singh, K Mummaneni Superlattices and Microstructures 148, 106725, 2020 | 16 | 2020 |
| Development of highly efficient ZnO nanorod-based nontoxic perovskite solar cell using AZO buffer layer and lanthanide doping C Dubey, DK Jarwal, H Kumar, Y Kumar, K Mummaneni, G Rawat IEEE Transactions on Electron Devices 69 (2), 622-630, 2022 | 12 | 2022 |
| A new pocket-doped NCFET for low power applications: Impact of ferroelectric and oxide thickness on its performance B Choudhuri, K Mummaneni Micro and Nanostructures 169, 207360, 2022 | 11 | 2022 |
| Source pocket-engineered hetero-gate dielectric SOI Tunnel FET with improved performance V Sharma, S Kumar, J Talukdar, K Mummaneni, G Rawat Materials Science in Semiconductor Processing 143, 106541, 2022 | 9 | 2022 |
| A survey on FDTD-based interconnect modeling NS Murthy, M Kavicharan Journal of Circuits, Systems and Computers 24 (01), 1530001, 2015 | 9 | 2015 |
| Analysis of performance for novel pocket-doped NCFET under the influence of interface trap charges and temperature variation B Choudhuri, K Mummaneni Microelectronics Journal 127, 105542, 2022 | 8 | 2022 |
| Impact of temperature counting the effect of back gate bias on the performance of extended source tunnel FET (ESTFET) with δp+ SiGe pocket layer J Talukdar, B Choudhuri, K Mummaneni Applied Physics A 127 (1), 24, 2021 | 8 | 2021 |
| An efficient delay estimation model for high speed VLSI interconnects M Kavicharan, NS Murthy, NB Rao 2013 International Conference on Advances in Computing, Communications and …, 2013 | 7 | 2013 |
| Highly sensitivity Non-Uniform Tunnel FET based biosensor using source engineering J Talukdar, G Rawat, K Mummaneni Materials Science and Engineering: B 293, 116455, 2023 | 6 | 2023 |
| Negative capacitance gate-all-around PZT silicon nanowire with high-K/metal gate MFIS structure for low SS and high I on/I off V Kumar, RK Maurya, G Rawat, K Mummaneni Semiconductor Science and Technology 38 (5), 055018, 2023 | 6 | 2023 |
| Noise behavior and reliability analysis of non-uniform body tunnel FET with dual material source J Talukdar, G Rawat, K Mummaneni Microelectronics Reliability 131, 114510, 2022 | 5 | 2022 |
| A novel extended source TFET with δp+− SiGe layer. Silicon 12: 2273–2281 J Talukdar, G Rawat, K Mummaneni | 5 | 2020 |
| Performance optimization of high-K GAA-PZT Negative Capacitance FET MFIS Silicon Nanowire for low power RFIC and analog applications V Kumar, RK Maurya, G Rawat, K Mummaneni Physica Scripta 98 (11), 115029, 2023 | 4 | 2023 |
| Optimized RTL design of a vending machine through FSM using verilog HDL P Chidananda Datta, C Vinay Kumar, R Singh, K Mummaneni Micro and Nanoelectronics Devices, Circuits and Systems: Select Proceedings …, 2022 | 4 | 2022 |
Jagritee TalukdarAssistant Professor, National Institute of Technology Meghalaya在 nitm.ac.in 的电子邮件经过验证
