| Analog field programmable CMOS operational transconductance amplifier (OTA) G Kapur, CM Markan, S Mittal, VP Pyara 2013 1st International Conference on Emerging Trends and Applications in …, 2013 | 8 | 2013 |
| Remote Triggered Analog Communication Laboratory for E-Learning. CM Markan, G Kumar, S Mittal, P Gupta, S Gupta, A Satsangi, A Gupta, ... International Journal of Online Engineering 9, 2013 | 8 | 2013 |
| Remote Laboratories--A Cloud Based Model for Teleoperation of Real Laboratories. CM Markan, S Gupta, S Mittal, G Kumar International Journal of Online Engineering 9 (2), 2013 | 6 | 2013 |
| Analog field programmable CMOS current conveyor G Kapur, S Mittal, CM Markan, VP Pyara 2012 Students Conference on Engineering and Systems, 1-6, 2012 | 6 | 2012 |
| Design of analog field programmable cmos current conveyor G Kapur, S Mittal, CM Markan, VP Pyara Sci J Circ Syst Sig Process 1, 9-21, 2012 | 6 | 2012 |
| Analog field programmable CMOS operational transresistance amplifier (OTRA) S Mittal, G Kapur, CM Markan, VP Pyara 2013 Students Conference on Engineering and Systems (SCES), 1-6, 2013 | 5 | 2013 |
| Design of field-programmable operational transresistance amplifier using floating-gate MOSFETs G Kapur, S Mittal, CM Markana, VP Pyara Microelectronics and Solid State Electronics 2 (2), 11-23, 2013 | 5 | 2013 |
| Current-mirror based level shifter circuit and methods for implementing the same H Nagarajan, S Mittal, A Rakheeb, NU Raravi, V Sharma US Patent 11,050,424, 2021 | 3 | 2021 |
| A Unique Design methodology to generate reconfigurable Analog ICs with simplified Design Cycle G Kapur, S Mittal, CM Markan, VP Pyara Workshop on Unique Chips and Systems UCAS-7, 28, 2012 | 3 | 2012 |
| Brain interfaced remote laboratory–a novel BCI application for inclusive education C Markan, S Gupta, G Kumar, P Gupta, S Mittal IEEE International Conference on Computational Intelligence and Virtual …, 2014 | 2 | 2014 |
| Remote Laboratories–A Cloud Based Model for Teleoperation of Real Laboratories” iJOE– CM Markan, S Gupta, S Mittal, G Kumar Issue2, May, 2013 | 2 | 2013 |
| Methods and systems for selectively enabling/disabling memory dies S Bhatia, S Mittal, VP Ramachandra, A Pai US Patent App. 17/832,479, 2023 | 1 | 2023 |
| Area and power efficient circuits for high-density standard cell libraries S Mittal, A Ghosh, G Utkarsh US Patent App. 16/865,542, 2020 | 1 | 2020 |
| Area and power efficient circuits for high-density standard cell libraries S Mittal, A Ghosh, G Utkarsh US Patent 10,672,756, 2020 | 1 | 2020 |
| Low voltage tolerant ultra-low power edge triggered flip-flop for standard cell library S Mittal, JS Bhatia, R Deshpande, PK Rana, CM Nikhila, A Ghosh, ... US Patent 10,651,850, 2020 | 1 | 2020 |
| Sense amplifier based high speed flip-flop design for advanced sub-micron FinFET standard cell library S Mittal, J Bhatia, R Deshpande, A Ghosh, PK Rana 2017 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia …, 2017 | 1 | 2017 |
| Free flow data path architectures S Mittal, S Bhatia US Patent 11,935,622, 2024 | | 2024 |
| Three-input exclusive NOR/OR gate using a CMOS circuit H Nagarajan, A Ghosh, S Mittal US Patent 11,152,942, 2021 | | 2021 |
| Non-volatile memory interface S Mittal, S Bhatia, V Ghatawade US Patent 11,048,443, 2021 | | 2021 |
| Unified chip enable, address and command latch enable protocol for nand memory S Mittal, S Bhatia, V Ghatawade US Patent 10,817,223, 2020 | | 2020 |
CM MarkanDayalbagh educational institute在 dei.ac.in 的电子邮件经过验证
CM MarkanDayalbagh educational institute在 dei.ac.in 的电子邮件经过验证
Priti GuptaPostdoctoral Fellow, Indian Institute of Technology, Delhi在 projectprakash.org 的电子邮件经过验证