STiDi-BP: Spike time displacement based error backpropagation in multilayer spiking neural networks M Mirsadeghi, M Shalchian, SR Kheradpisheh, T Masquelier Neurocomputing 427, 131-140, 2021 | 65 | 2021 |
Modeling of short-channel effects in GaN HEMTs M Allaei, M Shalchian, F Jazaeri IEEE Transactions on Electron Devices 67 (8), 3088-3094, 2020 | 38 | 2020 |
Room-temperature quantum effect in silicon nanoparticles obtained by low-energy ion implantation and embedded in a nanometer scale capacitor M Shalchian, J Grisolia, GB Assayag, H Coffin, SM Atarodi, A Claverie Applied Physics Letters 86 (16), 2005 | 38 | 2005 |
From continuous to quantized charging response of silicon nanocrystals obtained by ultra-low energy ion implantation M Shalchian, J Grisolia, GB Assayag, H Coffin, SM Atarodi, A Claverie Solid-state electronics 49 (7), 1198-1205, 2005 | 37 | 2005 |
Charge-based model for ultrathin junctionless DG FETs, including quantum confinement M Shalchian, F Jazaeri, JM Sallese IEEE Transactions on Electron Devices 65 (9), 4009-4014, 2018 | 28 | 2018 |
Design and FPGA implementation of dual-stage lane detection, based on Hough transform and localized stripe features S Malmir, M Shalchian Microprocessors and Microsystems 64, 12-22, 2019 | 27 | 2019 |
Transcapacitances in EPFL HEMT model F Jazaeri, M Shalchian, JM Sallese IEEE Transactions on Electron Devices 67 (2), 758-762, 2019 | 20 | 2019 |
Ultrathin junctionless nanowire FET model, including 2-D quantum confinements D Shafizade, M Shalchian, F Jazaeri IEEE Transactions on Electron Devices 66 (9), 4101-4106, 2019 | 20 | 2019 |
Design and simulation of an ultra-low power high performance CMOS logic: DMTGDI ER Pashaki, M Shalchian Integration 55, 194-201, 2016 | 18 | 2016 |
Spike time displacement-based error backpropagation in convolutional spiking neural networks M Mirsadeghi, M Shalchian, SR Kheradpisheh, T Masquelier Neural Computing and Applications 35 (21), 15891-15906, 2023 | 12 | 2023 |
Charge-based modeling of ultra narrow junctionless cylindrical nanowire FETs D Shafizade, M Shalchian, F Jazaeri Solid-State Electronics 185, 108153, 2021 | 10 | 2021 |
High-temperature HEMT model N Sahebghalam, M Shalchian, A Chalechale, F Jazaeri IEEE Transactions on Electron Devices 69 (9), 4821-4827, 2022 | 8 | 2022 |
Design of a model-based fuzzy-PID controller with self-tuning scaling factor for idle speed control of automotive engine S Banarezaei, M Shalchian Iranian Journal of Science and Technology, Transactions of Electrical …, 2019 | 8 | 2019 |
Circuit modelling of 2-AG indirect pathway via astrocyte as a catalyst for synaptic self repair F Azad, M Shalchian, M Amiri Analog Integrated Circuits and Signal Processing 95, 127-139, 2018 | 8 | 2018 |
The effects of oxidation conditions on structural and electrical properties of silicon nanoparticles obtained by ultra-low-energy ion implantation J Grisolia, M Shalchian, GB Assayag, H Coffin, C Bonafos, S Schamm, ... Nanotechnology 16 (12), 2987, 2005 | 8 | 2005 |
Non-quasi-static intrinsic GaN-HEMT model BJ Touchaei, M Shalchian IEEE Transactions on Electron Devices 69 (12), 6594-6601, 2022 | 7 | 2022 |
Influence of the thickness of the tunnel layer on the charging characteristics of Si nanocrystals embedded in an ultra-thin SiO2 layer C Dumas, J Grisolia, G Benassayag, C Bonafos, S Schamm, A Claverie, ... Physica E: Low-dimensional Systems and Nanostructures 38 (1-2), 80-84, 2007 | 7 | 2007 |
Memristor-based synaptic plasticity and unsupervised learning of spiking neural networks Z Hajiabadi, M Shalchian Journal of Computational Electronics 20 (4), 1625-1636, 2021 | 6 | 2021 |
Design of bioinspired tripartite synapse analog integrated circuit in 65-nm CMOS Technology S Tir, M Shalchian, M Moezzi Journal of Computational Electronics 19, 1313-1328, 2020 | 5 | 2020 |
Tunneling Current Through a Double Quantum Dots System A Rassekh, M Shalchian, JM Sallese, F Jazaeri Ieee Access 10, 75245-75256, 2022 | 4 | 2022 |