An energy harvesting chip designed to extract maximum power from a TEG AK Sinha, RL Radin, DD Caviglia, CG Montoro, MC Schneider 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 367-370, 2016 | 16 | 2016 |
Design, performance, and stability analysis of a formula based fuzzy PI controller V Kumar, KPS Rana, AK Sinha International Journal of Innovative Computing, Information and Control, 2011 | 16 | 2011 |
A self-starting 70mV-1V, 65% peak efficient, TEG energy harvesting chip with 5 ms startup time AK Sinha Journal of Circuits, Systems and Computers, 2016 | 5 | 2016 |
Efficient, 50 mV startup, with transient settling time< 5 ms, energy harvesting system for thermoelectric generator AK Sinha, MC Schneider Electronics Letters 52 (8), 646-648, 2016 | 5 | 2016 |
Design of an advanced signal conditioning unit for sensor with reduced off-the-shelf components AK Sinha, DD Caviglia, P Gaur 2012 International Conference on Devices, Circuits and Systems (ICDCS), 316-319, 2012 | 5 | 2012 |
A scheme for measuring and extracting level-1 parameter of FET device applied toward POSFET sensors array AK Sinha, M Valle ICM 2011 Proceeding, 1-5, 2011 | 5 | 2011 |
Epileptic seizures classification based on deep neural networks A Swetha, AK Sinha Proceedings of the International Conference on Paradigms of Computing …, 2021 | 4 | 2021 |
A short startup, batteryless, self-starting thermal energy harvesting chip working in full clock cycle AK Sinha, MC Schneider Circuits, Devices & Systems 11 (4), 10, 2017 | 4 | 2017 |
TCAD performance analysis of a symmetrical double gate non-aligned junction FET device with high and low dielectric gate oxide in sub-100 nm regime BV Naik, AK Sinha International Journal of Electronics Letters 11 (4), 399-410, 2023 | 3 | 2023 |
Nano design of a symmetrical junction non-aligned double gate FET device with improved analog figure of merit BV Naik, AK Sinha In 34th IEEE Int. Conf. on Microelectronics (ICM2022), Casablanca, Morocco …, 2023 | 3 | 2023 |
A review on recent machine learning algorithms used in CAD diagnosis GP Miriyala, AK Sinha, DNK Jayakody, A Sharma 2021 10th International Conference on Information and Automation for …, 2021 | 3 | 2021 |
Designing high-value resistive network using weak inversion region of a PMOS device at the floating gate of a sensor AK Sinha, DD Caviglia IETE Technical Review 30 (6), 473-482, 2013 | 3 | 2013 |
Effects of metal work function and gate-oxide dielectric on super high frequency performance of a non-align junction DG-MOSFET based inverter in the sub-100 nm regime: a TCAD … BV Naik, AK Sinha International Journal of Electronics, 1-16, 2023 | 2 | 2023 |
Prediction of crop yield using deep learning techniques: a concise review GP Miriyala, AK Sinha Recent Advances in Computer Based Systems, Processes and Applications, 145-159, 2020 | 2 | 2020 |
Computer-Aided Developments: Electronics and Communication AK Sinha, JP Darsy | 2 | 2019 |
Bias-point calculation and parameter extraction using EKV compact MOS model equation AK Sinha IETE Journal of Education 1 (1), 1-7, 2017 | 2 | 2017 |
An approach to realize high value resistance using PMOS device at weak inversion for POSFET sensor AK Sinha, M Valle ICM 2011 Proceeding, 1-4, 2011 | 2 | 2011 |
Bias circuit design for POSFET based tactile sensing devices AK Sinha, M Valle 2011 7th Conference on Ph. D. Research in Microelectronics and Electronics …, 2011 | 2 | 2011 |
A proposed non-aligned double gate junction FET device and its performance improvement using high-k gate oxide material AK Sinha, BV Naik Nano 18 (6), 2350040(1-6), 2023 | 1 | 2023 |
Voting Ensemble Learning Technique with Improved Accuracy for the CAD Diagnosis GP Miriyala, AK Sinha ICDSMLA 2021: Proceedings of the 3rd International Conference on Data …, 2023 | 1 | 2023 |