Harnessing voltage margins for energy efficiency in multicore CPUs G Papadimitriou, M Kaliorakis, A Chatzidimitriou, D Gizopoulos, ... Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 100 | 2017 |
Differential fault injection on microarchitectural simulators M Kaliorakis, S Tselonis, A Chatzidimitriou, N Foutris, D Gizopoulos 2015 IEEE international symposium on workload characterization, 172-182, 2015 | 100 | 2015 |
Demystifying soft error assessment strategies on arm cpus: Microarchitectural fault injection vs. neutron beam experiments A Chatzidimitriou, P Bodmann, G Papadimitriou, D Gizopoulos, P Rech 2019 49th Annual IEEE/IFIP International Conference on Dependable Systems …, 2019 | 70 | 2019 |
Anatomy of microarchitecture-level reliability assessment: Throughput and accuracy A Chatzidimitriou, D Gizopoulos 2016 IEEE International Symposium on Performance Analysis of Systems and …, 2016 | 56 | 2016 |
Adaptive voltage/frequency scaling and core allocation for balanced energy and performance on multicore cpus G Papadimitriou, A Chatzidimitriou, D Gizopoulos 2019 IEEE international symposium on high performance computer architecture …, 2019 | 53 | 2019 |
Multi-bit upsets vulnerability analysis of modern microprocessors A Chatzidimitriou, G Papadimitriou, C Gavanas, G Katsoridas, ... 2019 IEEE International Symposium on Workload Characterization (IISWC), 119-130, 2019 | 42 | 2019 |
Syra: Early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems A Vallero, A Savino, A Chatzidimitriou, M Kaliorakis, M Kooli, M Riera, ... IEEE Transactions on Computers 68 (5), 765-783, 2018 | 38 | 2018 |
Cross-layer system reliability assessment framework for hardware faults A Vallero, A Savino, G Politano, S Di Carlo, A Chatzidimitriou, S Tselonis, ... 2016 IEEE International Test Conference (ITC), 1-10, 2016 | 36 | 2016 |
Voltage margins identification on commercial x86-64 multicore microprocessors G Papadimitriou, M Kaliorakis, A Chatzidimitriou, C Magdalinos, ... 2017 IEEE 23rd international symposium on on-line testing and robust system …, 2017 | 33 | 2017 |
Exceeding conservative limits: A consolidated analysis on modern hardware margins G Papadimitriou, A Chatzidimitriou, D Gizopoulos, VJ Reddi, J Leng, ... IEEE Transactions on Device and Materials Reliability 20 (2), 341-350, 2020 | 29 | 2020 |
Modern hardware margins: CPUs, GPUs, FPGAs recent system-level studies D Gizopoulos, G Papadimitriou, A Chatzidimitriou, VJ Reddi, B Salami, ... 2019 IEEE 25th International Symposium on On-Line Testing and Robust System …, 2019 | 29 | 2019 |
Rt level vs. microarchitecture-level reliability assessment: Case study on arm (r) cortex (r)-a9 cpu A Chatzidimitriou, M Kaliorakis, D Gizopoulos, M Iacaruso, M Pipponzi, ... 2017 47th Annual IEEE/IFIP International Conference on Dependable Systems …, 2017 | 29 | 2017 |
Measuring and exploiting guardbands of server-grade ARMv8 CPU cores and DRAMs K Tovletoglou, L Mukhanov, G Karakonstantis, A Chatzidimitriou, ... 2018 48th Annual IEEE/IFIP International Conference on Dependable Systems …, 2018 | 27 | 2018 |
Micro-viruses for fast system-level voltage margins characterization in multicore CPUs G Papadimitriou, A Chatzidimitriou, M Kaliorakis, Y Vastakis, ... 2018 IEEE International Symposium on Performance Analysis of Systems and …, 2018 | 27 | 2018 |
Statistical analysis of multicore CPUs operation in scaled voltage conditions M Kaliorakis, A Chatzidimitriou, G Papadimitriou, D Gizopoulos IEEE Computer Architecture Letters 17 (2), 109-112, 2018 | 27 | 2018 |
Assessing the effects of low voltage in branch prediction units A Chatzidimitriou, G Papadimitriou, D Gizopoulos, S Ganapathy, ... 2019 IEEE International Symposium on Performance Analysis of Systems and …, 2019 | 22 | 2019 |
The impact of cpu voltage margins on power-constrained execution P Koutsovasilis, CD Antonopoulos, N Bellas, S Lalis, G Papadimitriou, ... IEEE Transactions on Sustainable Computing 7 (1), 221-234, 2020 | 20 | 2020 |
A system-level voltage/frequency scaling characterization framework for multicore CPUs G Papadimitriou, M Kaliorakis, A Chatzidimitriou, D Gizopoulos, G Favor, ... arXiv preprint arXiv:2106.09975, 2021 | 19 | 2021 |
An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits G Karakonstantis, K Tovletoglou, L Mukhanov, H Vandierendonck, ... 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 18 | 2018 |
Performance-aware reliability assessment of heterogeneous chips A Chatzidimitriou, M Kaliorakis, S Tselonis, D Gizopoulos 2017 IEEE 35th VLSI Test Symposium (VTS), 1-6, 2017 | 16 | 2017 |