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Sanghyun Ban
Sanghyun Ban
Postech / SK hynix
在 postech.ac.kr 的电子邮件经过验证
标题
引用次数
引用次数
年份
Effect of Silicon Doping in B–Te (B4Te6) Binary Ovonic Threshold Switch System
S Ban, S Lee, J Lee, H Hwang
IEEE Electron Device Letters 43 (4), 643-646, 2022
162022
Pulse dependent threshold voltage variation of the ovonic threshold switch in cross-point memory
S Ban, H Choi, W Lee, S Hong, H Zang, B Lee, M Kim, S Lee, H Lee, ...
IEEE Electron Device Letters 41 (3), 373-376, 2020
132020
Defect Engineering of BTe Ovonic Threshold Switch (OTS) with Nitrogen Doping for Improved Electrical and Reliability Performance
J Lee, S Ban, TH Lee, H Hwang
IEEE Electron Device Letters, 2023
42023
Improving the SiGeAsTe Ovonic Threshold Switching (OTS) Characteristics by Microwave Annealing for Excellent Endurance (> 1011) and Low Drift Characteristics
J Lee, S Kim, S Lee, S Ban, S Heo, D Lee, O Mosendz, H Hwang
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
42022
Relaxation oscillation effect of the ovonic threshold switch on the SET characteristics of phase-change memory in cross-point structure
SM Hong, M Kim, S Lee, SH Ban, H Zang, H Choi, T Kim
IEEE Electron Device Letters 42 (12), 1759-1761, 2021
42021
A technique for the non-destructive EUV mask sidewall angle measurement using scanning electron microscope
S Lee, J Lee, S Ban, HK Oh, B Nam, S Kim, D Yim, O Kim
Journal of Nanoscience and Nanotechnology 13 (12), 8032-8035, 2013
42013
Simple Binary In-Te OTS with Sub-nm HfOₓ Buffer Layer for 3D Vertical X-point Memory Applications
S Ban, J Lee, T Kim, H Hwang
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023
32023
Improving the selector characteristics of ovonic threshold switch via UV treatment process
Y Seo, J Lee, S Ban, D Kim, G Han, H Hwang
Applied Physics Letters 123 (24), 2023
22023
Enhancing Se-based Selector-only Memory with Ultra-fast Write Speed (~ 10 ns) and Superior Retention Characteristics (> 10 years at RT) via Material Design and UV Treatment …
J Lee, Y Seo, S Ban, D Kim, S Heo, D Kang, H Hwang
2023 International Electron Devices Meeting (IEDM), 1-4, 2023
22023
Chalcogenide material, variable resistance memory device and electronic device
GS Jung, SH Ban, JK Ahn, BS Lee, YH Lee, WT Lee, JH Lee, HJ Zang, ...
US Patent 11,707,005, 2023
22023
Read Disturbances in Cross-Point Phase-Change Memory Arrays—Part I: Physical Modeling With Phase-Change Dynamics
D Kim, JT Jang, C Kim, HW Kim, E Hong, S Ban, M Shin, H Lee, HD Lee, ...
IEEE Transactions on Electron Devices 70 (2), 514-520, 2022
22022
A physics-based compact model of phase change for the design of cross-point storage-class memories
D Kim, JT Jang, DM Kim, SJ Choi, S Ban, M Shin, H Lee, HD Lee, HS Mo, ...
Solid-State Electronics 185, 107955, 2021
22021
Electronic device and method of operating memory cell in the electronic device
SH Ban, BS Lee, WT Lee, TH Kim, HJ Zang, HJ Choi
US Patent 10,825,519, 2020
22020
Electronic device using resistive memory element and a recovery operation to compensate for threshold drift
LEE Woo-Tae, S Hong, T Kim, SH Ban, HJ Choi
US Patent 10,115,461, 2018
22018
Understanding Switching Mechanism of Selector-Only Memory Using Se-Based Ovonic Threshold Switch Device
J Lee, Y Seo, S Ban, DG Kim, YB Park, TH Lee, H Hwang
IEEE Transactions on Electron Devices, 2024
12024
Experimental Demonstration of Probabilistic-Bit (p-bit) Utilizing Stochastic Oscillation of Threshold Switch Device
S Heo, D Kim, W Choi, S Ban, O Kwon, H Hwang
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023
12023
Cell Design Considerations for Ovonic Threshold Switch-Based 3-D Cross-Point Array
S Ban, J Lee, T Kim, H Hwang
IEEE Transactions on Electron Devices 70 (3), 1034-1041, 2023
12023
A physics-based compact model for phase-change memory considering the ratio of vertical-to-lateral crystal growth rate for the design of cross-point storage-class memory
D Kim, J Tae Jang, D Myong Kim, SJ Choi, S Ban, M Shin, H Lee, ...
Solid State Electronics 185, 107955, 2021
12021
Chalcogenide material and electronic device including the same
LEE Woo-Tae, J Gwang-Sun, T Kim, SH Ban, BS Lee, U Hwang
US Patent 10,868,249, 2020
12020
Semiconductor memory capable of reducing an initial turn-on voltage of a memory cell using a stress pulse in a test mode, and method for driving the same
SH Ban, T Kim, LEE Woo-Tae, HJ Choi
US Patent 10,783,981, 2020
12020
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