| Identification of two-dimensional layered dielectrics from first principles MR Osanloo, ML Van de Put, A Saadat, WG Vandenberghe Nature communications 12 (1), 5051, 2021 | 59 | 2021 |
| Transition-metal nitride halide dielectrics for transition-metal dichalcogenide transistors MR Osanloo, A Saadat, ML Van de Put, A Laturia, WG Vandenberghe Nanoscale 14 (1), 157-165, 2022 | 31 | 2022 |
| Channel Length Scaling Limit for LDMOS Field-Effect Transistors: Semi-classical and Quantum Analysis A Saadat, PB Vyas, ML Van de Put, MV Fischetti, H Edwards, ... 2020 32nd International Symposium on Power Semiconductor Devices and ICs …, 2020 | 23 | 2020 |
| Simulation Study on the Optimization and Scaling Behavior of LDMOS Transistors for Low-Voltage Power Applications A Saadat, ML Van de Put, H Edwards, WG Vandenberghe IEEE Transactions on Electron Devices 67 (11), 4990-4997, 2020 | 17 | 2020 |
| Channel Length Optimization for Planar LDMOS Field-Effect Transistors for Low-Voltage Power Applications A Saadat, ML Van De Put, H Edwards, WG Vandenberghe IEEE Journal of the Electron Devices Society 8, 711-715, 2020 | 17 | 2020 |
| Figure-of-Merit for Laterally Diffused MOSFETs with Rectangular and Semi-Circular Field Oxides A Saadat, ML Van de Put, H Edwards, WG Vandenberghe 2021 33rd International Symposium on Power Semiconductor Devices and ICs …, 2021 | 6 | 2021 |
| LDMOS Drift Region With Field Oxides: Figure-of-Merit Derivation and Verification A Saadat, ML Van de Put, H Edwards, WG Vandenberghe IEEE Journal of the Electron Devices Society 10, 361-366, 2022 | 4 | 2022 |
| Algorithmic optimization of transistors applied to silicon LDMOS PJ Chuang, A Saadat, ML Van De Put, H Edwards, WG Vandenberghe IEEE Access 11, 64160-64169, 2023 | 2 | 2023 |
| Importance of separating contacts from the photosensitive layer in heterojunction phototransistors RM Imenabadi, A Saadat, TB Daunis, LNS Murthy, ML Van de Put, ... Superlattices and Microstructures 148, 106713, 2020 | 2 | 2020 |
| Third Quadrant Operation of SiC MOSFETs: Comprehensive Analysis and Condition Monitoring Solution R Sajadi, E Ugur, M Farhadi, BT Vankayalapati, A Saadat, ... IEEE Transactions on Components, Packaging and Manufacturing Technology, 2024 | 1 | 2024 |
| Constrained Bayesian Optimization Using a Lagrange Multiplier Applied to Power Transistor Design PJ Chuang, A Saadat, S Ghazvini, H Edwards, WG Vandenberghe arXiv preprint arXiv:2308.09612, 2023 | 1 | 2023 |
| Determining the Performance Limits of LDMOS With Three Common Types of Field Oxides PJ Chuang, A Saadat, S Ghazvini, H Edwards, WG Vandenberghe IEEE Transactions on Electron Devices, 2024 | | 2024 |
| Laterally Diffused Metal-oxide-semiconductor Field-effect Transistors: Device Design and Optimization for Low-voltage and Mid-voltage Power Applications A Saadat | | 2022 |
| Transition-metal nitride halide dielectrics for transition-metal dichalcogenide transistors. A Saadat, ML Van de Put, A Laturia, WG Vandenberghe Nanoscale 14 (1), 157-165, 2021 | | 2021 |
| Channel Length Scaling in Laterally Diffused Metal-Oxide-Semiconductor Field-Effect Transistors: A Semiclassical and Quantum Transport Study Ali Saadat, Pratik B. Vyas, Maarten L. Van de Put, Massimo V. Fischetti, Hal ... IEEE Semiconductor Interface Specialists Conference, 2019 | | 2019 |
| Simulation Study of Channel Length Scaling in Laterally Diffused Metal-Oxide-Semiconductor Field-Effect Transistors Ali Saadat, Maarten L. Van de Put, Hal Edwards, William G. Vandenberghe IEEE Semiconductor Interface Specialists Conference, 2018 | | 2018 |
| Session I: Silicon Devices & Applications A Saadat, M Van de Put, H Edwards, W Vandenberghe | | |
William VandenbergheAssociate Professor at U.T. Dallas, dept. Materials Science & Engineering在 utdallas.edu 的电子邮件经过验证
