An MOS transistor model for analog circuit design AIA Cunha, MC Schneider, C Galup-Montoro IEEE Journal of solid-state circuits 33 (10), 1510-1519, 1998 | 468 | 1998 |
Series-parallel association of FET's for high gain and high frequency applications C Galup-Montoro, MC Schneider, IJB Loss IEEE Journal of Solid-State Circuits 29 (9), 1094-1101, 1994 | 316 | 1994 |
CMOS analog design using all-region MOSFET modeling MC Schneider, C Galup-Montoro Cambridge University Press, 2010 | 272 | 2010 |
A 2-nW 1.1-V self-biased current reference in CMOS technology EM Camacho-Galeano, C Galup-Montoro, MC Schneider IEEE Transactions on Circuits and Systems II: Express Briefs 52 (2), 61-65, 2005 | 251 | 2005 |
Harmonic distortion caused by capacitors implemented with MOSFET gates AT Behr, MC Schneider, CG Montoro IEEE Journal of Solid-State Circuits 27 (10), 1470-1475, 1992 | 96 | 1992 |
An explicit physical model for the long-channel MOS transistor including small-signal parameters AIA Cunha, MC Schneider, C Galup-Montoro Solid-State Electronics 38 (11), 1945-1952, 1995 | 90 | 1995 |
Analysis and design of the classical CMOS Schmitt trigger in subthreshold operation LAP Melek, AL da Silva, MC Schneider, C Galup-Montoro IEEE Transactions on Circuits and Systems I: Regular Papers 64 (4), 869-878, 2016 | 81 | 2016 |
MOSFET threshold voltage: Definition, extraction, and some applications OF Siebel, MC Schneider, C Galup-Montoro Microelectronics Journal 43 (5), 329-336, 2012 | 71 | 2012 |
The advanced compact MOSFET (ACM) model for circuit analysis and design C Galup-Montoro, MC Schneider, AIA Cunha, FR de Sousa, H Klimach, ... 2007 IEEE Custom Integrated Circuits Conference, 519-526, 2007 | 70 | 2007 |
A compact model of MOSFET mismatch for circuit design C Galup-Montoro, MC Schneider, H Klimach, A Arnaud IEEE journal of solid-state circuits 40 (8), 1649-1657, 2005 | 69 | 2005 |
On the minimum supply voltage for MOSFET oscillators MB Machado, MC Schneider, C Galup-Montoro IEEE Transactions on Circuits and Systems I: Regular Papers 61 (2), 347-357, 2013 | 68 | 2013 |
Analysis of the rectifier circuit valid down to its low-voltage limit AJ Cardoso, LG de Carli, C Galup-Montoro, MC Schneider IEEE Transactions on Circuits and Systems I: Regular Papers 59 (1), 106-112, 2011 | 65 | 2011 |
Ultra-low-voltage operation of CMOS analog circuits: amplifiers, oscillators, and rectifiers C Galup-Montoro, MC Schneider, MB Machado IEEE Transactions on Circuits and Systems II: Express Briefs 59 (12), 932-936, 2012 | 52 | 2012 |
A 7.5-mV-input boost converter for thermal energy harvesting with 11-mV self-startup RL Radin, M Sawan, C Galup-Montoro, MC Schneider IEEE Transactions on Circuits and Systems II: Express Briefs 67 (8), 1379-1383, 2019 | 48 | 2019 |
Maximizing the power conversion efficiency of ultra-low-voltage CMOS multi-stage rectifiers LG de Carli, Y Juppa, AJ Cardoso, C Galup-Montoro, MC Schneider IEEE Transactions on Circuits and Systems I: Regular Papers 62 (4), 967-975, 2015 | 45 | 2015 |
Digitally programmable switched-current FIR filter for low-voltage applications FA Farag, C Galup-Montoro, MC Schneider IEEE Journal of Solid-State Circuits 35 (4), 637-641, 2000 | 43 | 2000 |
Temperature performance of sub-1V ultra-low power current sources EM Camacho-Galeano, JQ Moreira, MD Pereira, AJ Cardoso, ... 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 2230-2233, 2008 | 41 | 2008 |
Direct determination of threshold condition in DG-MOSFETs from the gm/ID curve AIA Cunha, MA Pavanello, RD Trevisoli, C Galup-Montoro, MC Schneider Solid-State Electronics 56 (1), 89-94, 2011 | 36 | 2011 |
PTAT voltage generator based on an MOS voltage divider C Rossi, C Galup Montoro, MC Schneider TechConnect Briefs, 2007, v. 3 Technical Proceedings of the 2007 NSTI …, 2007 | 35 | 2007 |
Resizing rules for MOS analog-design reuse C Galup-Montoro, MC Schneider, RM Coitinho IEEE design & test of computers 19 (2), 50-58, 2002 | 35 | 2002 |