| Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems R Wilhelm, D Grund, J Reineke, M Schlickling, M Pister, C Ferdinand IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 317 | 2009 |
| GrGen: A fast SPO-based graph rewriting tool R Geiß, G Batz, D Grund, S Hack, A Szalkowski Graph Transformations, 383-397, 2006 | 265 | 2006 |
| Timing predictability of cache replacement policies J Reineke, D Grund, C Berg, R Wilhelm Real-Time Systems 37, 99-122, 2007 | 257 | 2007 |
| Register allocation for programs in SSA-form S Hack, D Grund, G Goos Compiler Construction, 247-262, 2006 | 185 | 2006 |
| Building timing predictable embedded systems P Axer, R Ernst, H Falk, A Girault, D Grund, N Guan, B Jonsson, ... ACM Transactions on Embedded Computing Systems (TECS) 13 (4), 1-37, 2014 | 161 | 2014 |
| Predictability considerations in the design of multi-core embedded systems C Cullmann, C Ferdinand, G Gebhard, D Grund, C Maiza, J Reineke, ... Proceedings of Embedded Real Time Software and Systems, 2010 | 156 | 2010 |
| Precise and efficient FIFO-replacement analysis based on static phase detection D Grund, J Reineke 22nd Euromicro Conference on Real-Time Systems (ECRTS), 2010, 155-164, 2010 | 59 | 2010 |
| Static timing analysis for hard real-time systems R Wilhelm, S Altmeyer, C Burguière, D Grund, J Herter, J Reineke, ... Verification, Model Checking, and Abstract Interpretation, 3-22, 2010 | 59 | 2010 |
| Relative competitive analysis of cache replacement policies J Reineke, D Grund ACM Sigplan Notices 43 (7), 51-60, 2008 | 56 | 2008 |
| Caches in WCET analysis J Reineke Universität des Saarlandes, Saarbrücken, PhD Thesis, 2008 | 55 | 2008 |
| Toward precise PLRU cache analysis D Grund, J Reineke 10th International Workshop on Worst-Case Execution Time Analysis (WCET 2010 …, 2010 | 52 | 2010 |
| Abstract interpretation of FIFO replacement D Grund, J Reineke Static Analysis, 120-136, 2009 | 49 | 2009 |
| A fast cutting-plane algorithm for optimal coalescing D Grund, S Hack Compiler Construction, 111-125, 2007 | 44 | 2007 |
| Fast liveness checking for SSA-form programs B Boissinot, S Hack, D Grund, B Dupont de Dine hin, F Rastello Proceedings of the 6th annual IEEE/ACM international symposium on Code …, 2008 | 42 | 2008 |
| Computation takes time, but how much? R Wilhelm, D Grund Communications of the ACM 57 (2), 94-103, 2014 | 37 | 2014 |
| A template for predictability definitions with supporting evidence D Grund, J Reineke, R Wilhelm Predictability and Performance in Embedded Systems, 22--31, 2011 | 32 | 2011 |
| Branch target buffers: WCET analysis framework and timing predictability D Grund, J Reineke, G Gebhard Embedded and Real-Time Computing Systems and Applications, 2009 | 32 | 2009 |
| Static Cache Analysis for Real-Time Systems: LRU, FIFO, PLRU D Grund PhD thesis, Saarland University, 2011 | 29 | 2011 |
| Sensitivity of cache replacement policies J Reineke, D Grund | 29* | 2008 |
| Designing predictable multi-core architectures for avionics and automotive systems R Wilhelm, C Ferdinand, C Cullmann, D Grund, J Reineke, B Triquet Workshop on Reconciling Performance with Predictability, 2009 | 25 | 2009 |
Jan ReinekeProfessor of Computer Science, Saarland University, Saarland Informatics Campus在 cs.uni-saarland.de 的电子邮件经过验证
