Design, Modeling, Fabrication and Characterization of 2–5- Redistribution Layer Traces by Advanced Semiadditive Processes on Low-Cost Panel-Based Glass … H Lu, R Furuya, BMD Sawyer, C Nair, F Liu, V Sundaram, RR Tummala IEEE transactions on components, packaging and manufacturing technology 6 (6 …, 2016 | 40 | 2016 |
Design and demonstration of a 2.5-D glass interposer BGA package for high bandwidth and low cost BMD Sawyer, Y Suzuki, R Furuya, C Nair, TC Huang, V Smet, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 7 (4 …, 2017 | 38 | 2017 |
Advances in embedded traces for 1.5 µm RDL on 2.5 D glass interposers F Liu, C Nair, V Sundaram, RR Tummala 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 1736-1741, 2015 | 25 | 2015 |
“zero-undercut” semi-additive copper patterning-a breakthrough for ultrafine-line RDL lithographic structures and precision RF thinfilm passives PM Raj, C Nair, H Lu, F Liu, V Sundaram, DW Hess, R Tummala 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 402-405, 2015 | 24 | 2015 |
Innovative Sub-5- m Microvias by Picosecond UV Laser for Post-Moore Packaging Interconnects F Liu, G Khurana, R Zhang, A Watanabe, BH DeProspo, C Nair, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 9 …, 2019 | 22 | 2019 |
Heterogeneous integration for artificial intelligence: Challenges and opportunities S Mukhopadhyay, Y Long, B Mudassar, CS Nair, BH DeProspo, ... IBM Journal of Research and Development 63 (6), 4: 1-4: 1, 2019 | 21 | 2019 |
Next generation panel-scale RDL with ultra small photo vias and ultra-fine embedded trenches for low cost 2.5 D interposers and high density fan-out WLPs F Liu, A Kubo, C Nair, T Ando, R Furuya, S Dwarakanath, V Sundaram, ... 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 1515-1521, 2016 | 19 | 2016 |
Fundamentals of device and systems packaging: technologies and applications R Tummala McGraw Hill Professional, 2019 | 17 | 2019 |
Reliability studies of excimer laser-ablated microvias below 5 micron diameter in dry film polymer dielectrics for next generation, panel-scale 2.5 D interposer RDL C Nair, B DeProspo, H Hichri, M Arendt, F Liu, V Sundaram, R Tummala 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 1005-1009, 2018 | 15 | 2018 |
Next generation of 2-7 micron ultra-small microvias for 2.5 D panel redistribution layer by using laser and photolithography technologies F Liu, C Nair, G Khurana, A Watanabe, BH DeProspo, A Kubo, CP Lin, ... 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 924-930, 2019 | 14 | 2019 |
Effect of ultra-fine pitch RDL process variations on the electrical performance of 2.5 D glass interposers up to 110 GHz C Nair, H Lu, K Panayappan, F Liu, V Sundaram, R Tummala 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 2408-2413, 2016 | 14 | 2016 |
Modeling, design and fabrication of ultra-thin and low CTE organic interposers at 40µm I/O pitch Z Wu, C Nair, Y Suzuki, F Liu, V Smet, D Foxman, H Mishima, F Ryuta, ... 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 301-307, 2015 | 14 | 2015 |
Low-Cost 1- m Photolithography Technologies for Large-Body-Size, Low-Resistance Panel-Based RDL F Liu, C Nair, H Ito, BH DeProspo, S Ravichandran, H Akimaru, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 9 (7 …, 2019 | 12 | 2019 |
Organic Damascene Process for 1.5- m Panel-Scale Redistribution Layer Technology Using 5- m-Thick Dry Film Photosensitive Dielectrics F Liu, C Nair, A Kubo, T Ando, F Wei, V Sundaram, RR Tummala IEEE Transactions on Components, Packaging and Manufacturing Technology 8 (5 …, 2018 | 12 | 2018 |
Via-in-trench: A revolutionary panel-based package rdl configuration capable of 200-450 io/mm/layer, an innovation for more-than-moore system integration F Liu, C Nair, A Kubo, T Ando, H Lu, R Zhang, H Chen, KS Lee, ... 2017 IEEE 67th electronic components and technology conference (ECTC), 2097-2103, 2017 | 10 | 2017 |
Sputtered Ti-Cu as a superior barrier and seed layer for panel-based high-density RDL wiring structures C Nair, F Pieralisi, F Liu, V Sundaram, U Muehlfeld, M Hanika, ... 2015 IEEE 65th electronic components and technology conference (ECTC), 2248-2253, 2015 | 9 | 2015 |
A Review of Low Temperature Solders in Microelectronics Packaging V Jayaram, O Gupte, K Bhangaonkar, C Nair IEEE Transactions on Components, Packaging and Manufacturing Technology, 2023 | 7 | 2023 |
First demonstration of silicon-like> 250 I/O per mm per layer multilayer RDL on glass panel interposers by embedded photo-trench and fly cut planarization B DeProspo, F Liu, C Nair, A Kubo, F Wei, Y Chen, V Sundaram, ... 2018 IEEE 68th electronic components and technology conference (ECTC), 1152-1157, 2018 | 7 | 2018 |
Design and Demonstration of 1µm Low Resistance RDL Using Panel Scale Processes for High Performance Computing Applications B DeProspo, A Momozawa, A Kubo, C Nair, V Rajagoapal, J Kannan, ... 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 334-339, 2019 | 5 | 2019 |
Nanopackaging for component assembly and embedded power in flexible electronics: Heterogeneous component integration for flexible systems N Shahane, PM Raj, C Nair, V Smet, C Buch, R Tummala IEEE Nanotechnology Magazine 12 (4), 6-18, 2018 | 5 | 2018 |