Oxygen-activated growth and bandgap tunability of large single-crystal bilayer graphene Y Hao, L Wang, Y Liu, H Chen, X Wang, C Tan, S Nie, JW Suk, T Jiang, ... Nature nanotechnology 11 (5), 426-431, 2016 | 319 | 2016 |
Effect of thermal stresses on carrier mobility and keep-out zone around through-silicon vias for 3-D integration SK Ryu, KH Lu, T Jiang, JH Im, R Huang, PS Ho IEEE Transactions on Device and Materials Reliability 12 (2), 255-262, 2012 | 122 | 2012 |
Characterization of thermal stresses in through-silicon vias for three-dimensional interconnects by bending beam technique SK Ryu, T Jiang, KH Lu, J Im, HY Son, KY Byun, R Huang, PS Ho Applied Physics Letters 100 (4), 2012 | 122 | 2012 |
Measurement and analysis of thermal stresses in 3D integrated structures containing through-silicon-vias T Jiang, SK Ryu, Q Zhao, J Im, R Huang, PS Ho Microelectronics Reliability 53 (1), 53-62, 2013 | 117 | 2013 |
Plasticity mechanism for copper extrusion in through-silicon vias for three-dimensional interconnects T Jiang, C Wu, L Spinella, J Im, N Tamura, M Kunz, HY Son, B Gyu Kim, ... Applied Physics Letters 103 (21), 2013 | 84 | 2013 |
Through-silicon via stress characteristics and reliability impact on 3D integrated circuits T Jiang, J Im, R Huang, PS Ho Mrs Bulletin 40 (3), 248-256, 2015 | 70 | 2015 |
Quantitative microstructural imaging by scanning Laue x-ray micro-and nanodiffraction X Chen, C Dejoie, T Jiang, CS Ku, N Tamura MRS bulletin 41 (6), 445-453, 2016 | 47 | 2016 |
Effect of intermetallic formation on electromigration reliability of TSV-microbump joints in 3D interconnect Y Wang, SH Chae, R Dunne, Y Takahashi, K Mawatari, P Steinmann, ... 2012 IEEE 62nd Electronic Components and Technology Conference, 319-325, 2012 | 36 | 2012 |
Thermomechanical failure analysis of through-silicon via interface using a shear-lag model with cohesive zone SK Ryu, T Jiang, J Im, PS Ho, R Huang IEEE Transactions on Device and Materials Reliability 14 (1), 318-326, 2013 | 26 | 2013 |
Study of stresses and plasticity in through-silicon via structures for 3D interconnects by X-ray micro-beam diffraction T Jiang, C Wu, N Tamura, M Kunz, BG Kim, HY Son, MS Suh, J Im, ... IEEE Transactions on Device and Materials Reliability 14 (2), 698-703, 2014 | 19 | 2014 |
The interfacial reliability of through-glass vias for 2.5 D integrated circuits O Ahmed, G Jalilvand, S Pollard, C Okoro, T Jiang Microelectronics International 37 (4), 181-188, 2020 | 17 | 2020 |
Effect of wiring density and pillar structure on chip packaging interaction for mixed-signal Cu low k chips W Chu, T Jiang, PS Ho IEEE Transactions on Device and Materials Reliability 21 (3), 290-296, 2021 | 16 | 2021 |
Effect of scaling copper through-silicon vias on stress and reliability for 3D interconnects L Spinella, M Park, J Im, P Ho, N Tamura, T Jiang 2016 IEEE International Interconnect Technology Conference/Advanced …, 2016 | 14 | 2016 |
The effect of materials and design on the reliability of through-glass vias for 2.5 D integrated circuits: a numerical study O Ahmed, C Okoro, S Pollard, T Jiang Multidiscipline Modeling in Materials and Structures 17 (2), 451-464, 2021 | 13 | 2021 |
Synchrotron X-ray microdiffraction investigation of scaling effects on reliability for through-silicon vias for 3-D integration L Spinella, T Jiang, N Tamura, JH Im, PS Ho IEEE Transactions on Device and Materials Reliability 19 (3), 568-571, 2019 | 11 | 2019 |
Second-harmonic microscopy of strain fields around through-silicon-vias Y Cho, F Shafiei, BS Mendoza, M Lei, T Jiang, PS Ho, MC Downer Applied Physics Letters 108 (15), 2016 | 11 | 2016 |
Characterization of plasticity and stresses in TSV structures in stacked dies using synchrotron X-ray microdiffraction T Jiang, C Wu, P Su, X Liu, P Chia, L Li, HY Son, JS Oh, KY Byun, NS Kim, ... 2013 IEEE 63rd Electronic Components and Technology Conference, 641-647, 2013 | 10 | 2013 |
The effective control of Cu through-silicon via extrusion for three-dimensional integrated circuits by a metallic cap layer G Jalilvand, O Ahmed, L Spinella, L Zhou, T Jiang Scripta Materialia 164, 101-104, 2019 | 9 | 2019 |
Die and package level thermal and thermal/moisture stresses in 3D packaging: Modeling and characterization L Chen, T Jiang, X Fan 3D Microelectronic Packaging: From Fundamentals to Applications, 293-332, 2017 | 9 | 2017 |
The effect of pitch distance on the statistics and morphology of through-silicon via extrusion G Jalilvand, O Ahmed, N Dube, T Jiang IEEE Transactions on Components, Packaging and Manufacturing Technology 11 …, 2021 | 8 | 2021 |