| Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols U Banerjee, TS Ukyab, AP Chandrakasan IACR Transactions on Cryptographic Hardware and Embedded Systems 2019 (4), 17-61, 2019 | 215 | 2019 |
| An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications U Banerjee, C Juvekar, A Wright, Arvind, AP Chandrakasan 2018 IEEE International Solid-State Circuits Conference (ISSCC), 42-44, 2018 | 65* | 2018 |
| An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications U Banerjee, A Wright, C Juvekar, M Waller, Arvind, AP Chandrakasan IEEE Journal of Solid-State Circuits 54 (8), 2339-2352, 2019 | 61 | 2019 |
| An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things U Banerjee, A Pathak, AP Chandrakasan 2019 IEEE International Solid-State Circuits Conference (ISSCC), 46-48, 2019 | 54 | 2019 |
| eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things U Banerjee, C Juvekar, SH Fuller, AP Chandrakasan 2017 IEEE Global Communications Conference (GLOBECOM), 1-6, 2017 | 44 | 2017 |
| Leaky Nets: Recovering Embedded Neural Network Models and Inputs through Simple Power and Timing Side-Channels – Attacks and Defenses S Maji, U Banerjee, AP Chandrakasan IEEE Internet of Things Journal 8 (15), 12079-12092, 2021 | 39 | 2021 |
| A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices S Maji, U Banerjee, SH Fuller, MR Abdelhamid, PM Nadeau, RT Yazicigil, ... 2020 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2020 | 27 | 2020 |
| Power-based Side-Channel Attack for AES Key Extraction on the Atmega328 Microcontroller U Banerjee, L Ho, S Koppula Computer Systems Security, 2015 | 19* | 2015 |
| Comparative DC Characteristic Analysis of AlGaN/GaN HEMTs Grown on Si(111) and Sapphire Substrates by MBE P Mukhopadhyay, A Bag, U Gomes, U Banerjee, S Ghosh, S Kabi, ... Journal of Electronic Materials 43 (4), 1263-1270, 2014 | 19 | 2014 |
| A Low-Power BLS12-381 Pairing Crypto-Processor for Internet-of-Things Security Applications U Banerjee, AP Chandrakasan IEEE Solid-State Circuits Letters 4, 190-193, 2021 | 18 | 2021 |
| Accelerating Post-Quantum Cryptography using an Energy-Efficient TLS Crypto-Processor U Banerjee, S Das, AP Chandrakasan 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 18 | 2020 |
| Beyond Crypto: Physical-Layer Security for Internet of Things Devices RT Yazicigil, PM Nadeau, DD Richman, C Juvekar, S Maji, U Banerjee, ... IEEE Solid-State Circuits Magazine 12 (4), 66-78, 2020 | 16 | 2020 |
| A Threshold Implementation-Based Neural Network Accelerator with Power and Electromagnetic Side-Channel Countermeasures S Maji, U Banerjee, SH Fuller, AP Chandrakasan IEEE Journal of Solid-State Circuits 58 (1), 141-154, 2022 | 13 | 2022 |
| A ThreshoId-ImpIementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks S Maji, U Banerjee, SH Fuller, AP Chandrakasan 2022 IEEE International Solid-State Circuits Conference (ISSCC), 518-520, 2022 | 13 | 2022 |
| Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things and Related Techniques U Banerjee, AP Chandrakasan US Patent 11,416,638, 2022 | 12 | 2022 |
| A Low-Power Elliptic Curve Pairing Crypto-Processor for Secure Embedded Blockchain and Functional Encryption U Banerjee, AP Chandrakasan 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 12 | 2021 |
| Efficient Post-Quantum TLS Handshakes using Identity-Based Key Exchange from Lattices U Banerjee, AP Chandrakasan 2020 IEEE International Conference on Communications (ICC), 1-6, 2020 | 12 | 2020 |
| Energy-Efficient Protocols and Hardware Architectures for Transport Layer Security U Banerjee Massachusetts Institute of Technology, 2017 | 12 | 2017 |
| Influence of Growth Morphology on Electrical and Thermal Modeling of AlGaN/GaN HEMT on Sapphire and Silicon P Mukhopadhyay, U Banerjee, A Bag, S Ghosh, D Biswas Solid-State Electronics 104, 101-108, 2015 | 11 | 2015 |
| Efficient Algorithms, Protocols and Hardware Architectures for Next-Generation Cryptography in Embedded Systems U Banerjee Massachusetts Institute of Technology, 2021 | 6 | 2021 |
Anantha ChandrakasanDean of Engineering, Massachusetts Institute of Technology在 mit.edu 的电子邮件经过验证
