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Erik Brunvand
Erik Brunvand
School of Computing, University of Utah
在 cs.utah.edu 的电子邮件经过验证
标题
引用次数
引用次数
年份
Impulse: Building a smarter memory controller
J Carter, W Hsieh, L Stoller, M Swanson, L Zhang, E Brunvand, A Davis, ...
Proceedings Fifth International Symposium on High-Performance Computer …, 1999
3701999
Translating concurrent programs into delay-insensitive circuits.
E Brunvand, RF Sproull
ICCAD, 262-265, 1989
1911989
Translating concurrent communicating programs into asynchronous circuits.
EL Brunvand
1521993
Digital VLSI chip design with Cadence and Synopsys CAD tools
E Brunvand
Addison-Wesley, 2010
852010
The NSR processor
E Brunvand
[1993] Proceedings of the Twenty-sixth Hawaii International Conference on …, 1993
851993
Using FPGAs to implement self-timed systems
E Brunvand
Journal of VLSI signal processing systems for signal, image and video …, 1993
731993
Fast, effective BVH updates for animated scenes
D Kopta, T Ize, J Spjut, E Brunvand, A Davis, A Kensler
Proceedings of the ACM SIGGRAPH Symposium on Interactive 3D Graphics and …, 2012
662012
Performance analysis and optimization of asynchronous circuits
P Kudva, G Gopalakrishnan, E Brunvand, V Akella
Proceedings 1994 IEEE International Conference on Computer Design: VLSI in …, 1994
61*1994
TRaX: A multicore hardware architecture for real-time ray tracing
J Spjut, A Kensler, D Kopta, E Brunvand
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
582009
Testing micropipelines
A Khoche, E Brunvand
Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous …, 1994
571994
Estimating performance of a ray-tracing ASIC design
S Woop, E Brunvand, P Slusallek
2006 IEEE Symposium on Interactive Ray Tracing, 7-14, 2006
522006
A cell set for self-timed design using Actel FPGAs
E Brunvand
University of Utah, Department of Computer Science, 1991
441991
Translating concurrent communicating programs into delay-insensitive circuits
E Brunvand, RF Sproull
Carnegie Mellon University, Computer Science Department, 1989
441989
Fred: An architecture for a self-timed decoupled computer
WF Richardson, E Brunvand
Proceedings Second International Symposium on Advanced Research in …, 1996
431996
An energy and bandwidth efficient ray tracing architecture
D Kopta, K Shkurko, J Spjut, E Brunvand, A Davis
Proceedings of the 5th High-Performance Graphics Conference, 121-128, 2013
422013
Efficient MIMD architectures for high-performance ray tracing
D Kopta, J Spjut, E Brunvand, A Davis
2010 IEEE International Conference on Computer Design, 9-16, 2010
422010
Low latency self-timed flow-through FIFOs
E Brunvand
Proceedings Sixteenth Conference on Advanced Research in VLSI, 76-90, 1995
411995
A partial scan methodology for testing self-timed circuits
A Khoche, E Brunvand
Proceedings 13th IEEE VLSI Test Symposium, 283-289, 1995
381995
TRaX: A multi-threaded architecture for real-time ray tracing
J Spjut, S Boulos, D Kopta, E Brunvand, S Kellis
2008 Symposium on Application Specific Processors, 108-114, 2008
332008
Practical advances in asynchronous design and in asynchronous/synchronous interfaces
E Brunvand, S Nowick, K Yun
Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 104-109, 1999
331999
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