| An integrated layout-synthesis approach for analog ICs R Castro-Lopez, O Guerra, E Roca, FV Fernández IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 134 | 2008 |
| A memetic approach to the automatic design of high-performance analog integrated circuits B Liu, FV Fernández, G Gielen, R Castro-López, E Roca ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (3 …, 2009 | 58 | 2009 |
| An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors R González-Echevarría, E Roca, R Castro-López, FV Fernández, J Sieiro, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 47 | 2016 |
| Reuse-based methodologies and tools in the design of analog and mixed-signal integrated circuits RC López, FV Fernández, Ó Guerra-Vinuesa, Á Rodríguez-Vázquez Springer Science & Business Media, 2007 | 45 | 2007 |
| A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, R Castro-Lopez, E Roca, ... IEEE Journal of Solid-State Circuits 54 (2), 476-488, 2018 | 43 | 2018 |
| Analog layout synthesis-Recent advances in topological approaches H Graeb, F Balasa, R Castro-López, YW Chang, FV Fernandez, PH Lin, ... 2009 Design, Automation & Test in Europe Conference & Exhibition, 274-279, 2009 | 41 | 2009 |
| Two-step RF IC block synthesis with preoptimized inductors and full layout generation in-the-loop R Martins, N Lourenço, F Passos, R Póvoa, A Canelas, E Roca, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 39 | 2018 |
| Reliability simulation for analog ICs: Goals, solutions, and challenges A Toro-Frías, P Martín-Lloret, J Martín-Martínez, R Castro-López, E Roca, ... Integration 55, 341-348, 2016 | 37 | 2016 |
| Automated generation of the optimal performance trade-offs of integrated inductors R Gonzalez-Echevarria, R Castro-Lopez, E Roca, FV Fernandez, J Sieiro, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 37 | 2014 |
| Multimode pareto fronts for design of reconfigurable analogue circuits R Castro-López, E Roca, FV Fernández Electronics Letters 45 (2), 1, 2009 | 37 | 2009 |
| Adaptive CMOS analog circuits for 4G mobile terminals—Review and state-of-the-art survey JM de la Rosa, R Castro-López, A Morgado, EC Becerra-Alvarez, ... Microelectronics Journal 40 (1), 156-176, 2009 | 37 | 2009 |
| A multilevel bottom-up optimization methodology for the automated synthesis of RF systems F Passos, E Roca, J Sieiro, R Fiorelli, R Castro-López, JM López-Villegas, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 34 | 2019 |
| Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK A Morgado, VJ Rivas, R del Río, R Castro-López, FV Fernández, ... Integration 41 (2), 269-280, 2008 | 32 | 2008 |
| Analog/RF and mixed-signal circuit systematic design E Tlelo-Cuautle Springer, 2013 | 31 | 2013 |
| Flexible setup for the measurement of CMOS time-dependent variability with array-based integrated circuits J Diaz-Fortuny, P Saraza-Canflanca, R Castro-Lopez, E Roca, ... IEEE Transactions on Instrumentation and Measurement 69 (3), 853-864, 2019 | 27 | 2019 |
| Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling F Passos, E Roca, R Castro-López, FV Fernández Applied Soft Computing 60, 495-507, 2017 | 25 | 2017 |
| Generation of technology-independent retargetable analog blocks R Castro-Lopez, FV Fernández, F Medeiro, A Rodriguez-Vazquez Analog Integrated Circuits and Signal Processing 33, 157-170, 2002 | 25 | 2002 |
| A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits F Passos, R González-Echevarría, E Roca, R Castro-López, ... Soft Computing 23, 4911-4925, 2019 | 24 | 2019 |
| Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors FV Fernández, J Esteban-Muller, E Roca, R Castro-López IEEE Congress on Evolutionary Computation, 1-8, 2010 | 24 | 2010 |
| Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors M Kotti, R González-Echevarría, FV Fernández, E Roca, J Sieiro, ... Analog integrated circuits and signal processing 78, 87-97, 2014 | 22 | 2014 |
Francisco FernandezIMSE, Universidad de Sevilla y CSIC在 us.es 的电子邮件经过验证
