| A single-stage operational amplifier with enhanced transconductance and slew rate for switched-capacitor circuits M Yavari, T Moosazadeh Analog Integrated Circuits and Signal Processing 79, 589-598, 2014 | 49 | 2014 |
| Equalization-based digital background calibration technique for pipelined ADCs B Zeinali, T Moosazadeh, M Yavari, A Rodriguez-Vazquez IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 322-333, 2013 | 34 | 2013 |
| A predetermined LMS digital background calibration technique for pipelined ADCs MA Montazerolghaem, T Moosazadeh, M Yavari IEEE Transactions on Circuits and Systems II: Express Briefs 62 (9), 841-845, 2015 | 22 | 2015 |
| A single channel split ADC structure for digital background calibration in pipelined ADCs MA Montazerolghaem, T Moosazadeh, M Yavari IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (4 …, 2017 | 12 | 2017 |
| A calibration technique for pipelined ADCs using self-measurement and histogram-based test methods T Moosazadeh, M Yavari IEEE Transactions on Circuits and Systems II: Express Briefs 62 (9), 826-830, 2015 | 12 | 2015 |
| A pseudo-differential MDAC with a gain-boosting inverter for pipelined ADCs T Moosazadeh, M Yavari Analog Integrated Circuits and Signal Processing 79, 255-266, 2014 | 5 | 2014 |
| A novel digital background calibration technique for pipelined ADCs T Moosazadeh, M Yavari Proceedings of Papers 5th European Conference on Circuits and Systems for …, 2010 | 5 | 2010 |
| A pseudo‐differential current‐reuse structure for opamp‐sharing pipelined analog‐to‐digital converters T Moosazadeh, M Yavari International Journal of Circuit Theory and Applications 43 (7), 917-928, 2015 | 4 | 2015 |
| A novel digital calibration technique for pipelined ADCs T Moosazadeh, M Yavari IEICE Electronics Express 7 (23), 1741-1746, 2010 | 4 | 2010 |
| A 10-bit 100-MSample/s pipelined analog-to-digital converter using digital calibration technique T Moosazadeh, M Yavari 2011 19th Iranian Conference on Electrical Engineering, 1-5, 2011 | 2 | 2011 |
| A multi-stage sigma-delta modulator based on noise-coupling and digital feed-forward techniques H Fakhraie, T Moosazadeh, R Sabbaghi-Nadooshan, A Hassanzadeh Analog Integrated Circuits and Signal Processing 108, 253-266, 2021 | 1 | 2021 |
| A simple digital background gain error calibration technique for pipelined ADCs T Moosazadeh, M Yavari 2010 18th Iranian Conference on Electrical Engineering, 437-441, 2010 | 1 | 2010 |
| A CMOS Low-Power Noise Shaping-Enhanced SMASH ΣΔ Modulator H Fakhraie, T Moosazadeh, R Sabbaghy, A Hassanzadeh Majlesi Journal of Electrical Engineering 16 (1), 95-108, 2022 | | 2022 |
| A Smart Noise-Coupling Technique for low power DT-Σ∆ Modulators H Fakhraie, T Moosazadeh, R Sabbaghi-nadooshan, A Hassanzadeh International Journal of Smart Electrical Engineering 1 (1), 35, 2022 | | 2022 |
| A Smart Noise-Coupling Technique for low power DT-Σ∆ H Fakhraie, T Moosazadeh, R Sabbaghi-Nadooshan, A Hassanzadeh | | 2022 |
| Digital Multi-Bit Sigma-Delta Controller for Synchronous Buck DC-DC Converter B Abdi, T Moosazadeh, JS Moghani International Journal of Computer and Electrical Engineering 4 (6), 878, 2012 | | 2012 |
| A Fully Digital Calibration Technique for Nonlinearity Correction in Pipelined ADCs T Moosazadeh, M Yavari | | |
| Vector-Matrix Multiply and Winner-Take-All as an Analog Classifier................. S. Ramakrishnan and J. Hasler 353 Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter … B Zeinali, T Moosazadeh, M Yavari, A Rodriguez-Vazquez | | |
Mohammad YavariDepartment of Electrical Engineering, Amirkabir University of Technology在 aut.ac.ir 的电子邮件经过验证
