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Tingyuan LIANG
Tingyuan LIANG
在 connect.ust.hk 的电子邮件经过验证 - 首页
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引用次数
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年份
Machine learning based routing congestion prediction in FPGA high-level synthesis
J Zhao, T Liang, S Sinha, W Zhang
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
552019
FP-Stereo: Hardware-efficient stereo vision for embedded applications
J Zhao, T Liang, L Feng, W Ding, S Sinha, W Zhang, S Shen
2020 30th International Conference on Field-Programmable Logic and …, 2020
242020
Paas: A system level simulator for heterogeneous computing architectures
T Liang, L Feng, S Sinha, W Zhang
2017 27th International Conference on Field Programmable Logic and …, 2017
242017
Hi-ClockFlow: Multi-clock dataflow automation and throughput optimization in high-level synthesis
T Liang, J Zhao, L Feng, S Sinha, W Zhang
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-6, 2019
152019
Hi-DMM: High-performance dynamic memory management in high-level synthesis
T Liang, J Zhao, L Feng, S Sinha, W Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
122018
AMF-placer: High-performance analytical mixed-size placer for FPGA
T Liang, G Chen, J Zhao, S Sinha, W Zhang
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021
102021
LAMA: Link-aware hybrid management for memory accesses in emerging CPU-FPGA platforms
L Feng, J Zhao, T Liang, S Sinha, W Zhang
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
52019
AMF-Placer 2.0: Open source timing-driven analytical mixed-size placer for large-scale heterogeneous FPGA
T Liang, G Chen, J Zhao, S Sinha, W Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
32024
Hl-pow: learning-assisted pre-RTL power modeling and optimization for FPGA HLS
Z Lin, T Liang, J Zhao, S Sinha, W Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023
22023
FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs
L Du, T Liang, S Sinha, Z Xie, W Zhang
Proceedings of the 2023 ACM/SIGDA International Symposium on Field …, 2023
22023
PROPHET: Predictive On-Chip Power Meter in Hardware Accelerator for DNN
J Peng, T Liang, Z Xie, W Zhang
2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023
12023
A Hybrid Data-Consistent Framework for Link-Aware AccessManagement in Emerging CPU-FPGA Platforms
L Feng, J Zhao, T Liang, S Sinha, W Zhang
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
12019
Data-Pattern-Based Predictive On-Chip Power Meter in DNN Accelerator
J Peng, T Liang, J Jiang, Y Zhang, Z Lin, Z Xie, W Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
2024
GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network
C Su, L Du, T Liang, Z Lin, M Wang, S Sinha, W Zhang
Proceedings of the 2024 ACM/SIGDA International Symposium on Field …, 2024
2024
A Modular Branch Predictor Performance Analysis Framework for Fast Design Space Exploration
Y Wang, H Fan, S Li, T Liang, W Zhang
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024
2024
FADO: Floorplan-Aware Directive Optimization Based on Synthesis and Analytical Models for High-Level Synthesis Designs on Multi-Die FPGAs
L Du, T Liang, X Zhou, J Ge, S Li, S Sinha, J Zhao, Z Xie, W Zhang
ACM Transactions on Reconfigurable Technology and Systems, 2024
2024
DiffLo: A Graph-based Method for Functional Discrepancy Localization in High-level Synthesis
L Chen, T Liang, W Zhang, S Sinha
2023 International Conference on Field Programmable Technology (ICFPT), 300-301, 2023
2023
AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining
T Liang, J Chen, L Li, W Zhang
arXiv preprint arXiv:2207.12314, 2022
2022
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