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Har Narayan Upadhyay
Har Narayan Upadhyay
Professor
在 ece.sastra.edu 的电子邮件经过验证 - 首页
标题
引用次数
引用次数
年份
Survey and analysis of hardware cryptographic and steganographic systems on FPGA
S Rajagopalan, R Amirtharajan, HN Upadhyay, JBB Rayappan
Journal of Applied Sciences(Faisalabad) 12 (3), 201-210, 2012
632012
Encrypted biography of biomedical image-a pentalayer cryptosystem on FPGA
D Ravichandran, S Rajagopalan, HN Upadhyay, JBB Rayappan, ...
Journal of Signal Processing Systems 91, 475-501, 2019
422019
Networked hardware assisted key image and chaotic attractors for secure RGB image communication
S Rajagopalan, S Rethinam, S Arumugham, HN Upadhyay, ...
Multimedia Tools and Applications 77, 23449-23482, 2018
252018
Hide and seek in silicon–Performance analysis of Quad block Equisum Hardware Steganographic systems
S Rajagopalan, S Janakiraman, HN Upadhyay, K Thenmozhi
Procedia Engineering 30, 806-813, 2012
252012
ONChip peripherals are ON for chaos–an image fused encryption
S Rajagopalan, R Sivaraman, HN Upadhyay, JBB Rayappan, ...
Microprocessors and Microsystems 61, 257-278, 2018
232018
Stego system on chip with LFSR based information hiding approach
R Sundararaman, HN Upadhyay
International Journal of Computer Applications 18 (2), 24-31, 2011
232011
YRBS coding with logistic map–a novel Sanskrit aphorism and chaos for image encryption
S Rajagopalan, S Sharma, S Arumugham, HN Upadhyay, JBB Rayappan, ...
Multimedia Tools and applications 78, 10513-10541, 2019
222019
MSB based embedding with integrity: An adaptive RGB Stego on FPGA platform
S Rajagopalan, PJS Prabhakar, MS Kumar, NVM Nikhil, HN Upadhyay, ...
Information Technology Journal 13 (12), 1945-1952, 2014
182014
Fault-tolerant digital filters on FPGA using hardware redundancy techniques
P Mallavarapu, HN Upadhyay, G Rajkumar, V Elamaran
2017 International conference of Electronics, Communication and Aerospace …, 2017
172017
Design and Implementation of Chao-Cryptic Architecture on FPGA for Secure Audio Communication
B Sowmya, VM Padmapriya, R Sivaraman, A Rengarajan, S Rajagopalan, ...
Emerging Technologies in Data Mining and Information Security: Proceedings …, 2021
162021
CMOS VLSI design of low power SRAM cell architectures with new TMR: a layout approach
V Elamaran, HN Upadhyay
Asian Journal of Scientific Research 8 (4), 466, 2015
152015
A case study of impulse noise reduction using morphological image processing with structuring elements
V Elamaran, HN Upadhyay, K Narasimhan, JJ Priestley
Asian Journal of Scientific Research 8 (3), 291, 2015
132015
A case study of nanoscale FPGA programmable switches with low power
V Elamaran, HN Upadhyay
International Journal of Engineering and Technology 5 (2), 1512-1519, 2013
132013
Low power digital barrel shifter datapath circuits using microwind layout editor with high reliability
V Elamaran, HN Upadhyay
Asian Journal of Scientific Research 8 (4), 478, 2015
112015
Galois field proficient product for secure image encryption on FPGA
S Rajagopalan, HN Upadhyay, JBB Rayappan, R Amirtharajan
Research Journal of Information Technology 6 (4), 308-324, 2014
112014
Area, delay and power comparison of fault-tolerant systems with TMR using different voter circuits
V Elamaran, HN Upadhyay
International Journal of Signal and Imaging Systems Engineering 10 (1-2), 63-71, 2017
102017
Logic elements consumption analysis of cellular automata based image encryption on FPGA
S Rajagopalan, HN Upadhyay, JBB Rayappan, R Amirtharajan
Res. J. Inform. Technol 6, 291-307, 2014
102014
Stego on song-an amalgam of VI and FPGA for hardware info hide
S Rajagopalan, K Pravallika, R Radha, HN Upadhyay, JBB Rayappan, ...
Information Technology Journal 13 (12), 1992, 2014
92014
Analysis of pull-in behavior of electrostatic MEMS actuators for optical switching applications
M Maheswaran, M Nambirajan, UCC Yadav, HN Upadhyay
Journal of Applied Sciences 12 (16), 1730-1733, 2012
92012
Gyratory assisted info hide-a nibble differencing for message embedding
S Rajagopalan, HN Upadhyay, S Varadarajan, JBB Rayappan, ...
Inform. Technol. J 13, 2005-2010, 2014
82014
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