| Purely Electronic Switching with High Uniformity, Resistance Tunability, and Good Retention in Pt‐Dispersed SiO2 Thin Films for ReRAM BJ Choi, ABK Chen, X Yang, IW Chen Advanced Materials 23 (33), 3847-3852, 2011 | 126 | 2011 |
| Dynamic-load-enabled ultra-low power multiple-state RRAM devices X Yang, IW Chen Scientific reports 2, 744, 2012 | 63 | 2012 |
| A Parallel Circuit Model for Multi‐State Resistive‐Switching Random Access Memory ABK Chen, BJ Choi, X Yang, IW Chen Advanced Functional Materials 22 (3), 546-554, 2012 | 42 | 2012 |
| Demonstration and modeling of multi-bit resistance random access memory X Yang, ABK Chen, B Joon Choi, IW Chen Applied Physics Letters 102 (4), 2013 | 34 | 2013 |
| Cause and prevention of moisture-induced degradation of resistance random access memory nanodevices X Yang, BJ Choi, ABK Chen, IW Chen ACS nano 7 (3), 2302-2311, 2013 | 33 | 2013 |
| Resolving Voltage-Time Dilemma Using an Atomic-scale Lever of Sub-picosecond Electron-Phonon Interaction X Yang, I Tudosa, BJ Choi, ABK Chen, IW Chen Nano Letters 14 (9), 5058–5067, 2014 | 26 | 2014 |
| Sub-block mode for non-volatile memory X Yang, HY Tseng, X Miao, D Dutta US Patent 10,157,680, 2018 | 24 | 2018 |
| Memory device with connected word lines for fast programming X Yang, HY Tseng, D Dutta US Patent 10,726,922, 2020 | 19 | 2020 |
| Pre-charge voltage for inhibiting unselected NAND memory cell programming X Yang US Patent 10,726,920, 2020 | 18 | 2020 |
| Programming process combining adaptive verify with normal and slow programming speeds in a memory device X Yang, HY Tseng, D Dutta US Patent 10,910,075, 2021 | 16 | 2021 |
| Interleaved program and verify in non-volatile memory X Yang, HY Tseng, D Dutta US Patent 10,643,721, 2020 | 15 | 2020 |
| Peak current suppression X Yang, HY Tseng, D Dutta US Patent 10,559,365, 2020 | 15 | 2020 |
| System and method for in-situ programming and read operation adjustments in a non-volatile memory X Yang, P Dak, W Zhao, HY Tseng, D Dutta, M Dunga US Patent 10,559,370, 2020 | 15 | 2020 |
| Dynamic erase loop dependent bias voltage X Yang, D Dutta, HY Tseng US Patent 10,482,985, 2019 | 14 | 2019 |
| Non-volatile memory with countermeasures for select gate disturb during program pre-charge X Yang US Patent 10,559,368, 2020 | 13 | 2020 |
| Asymmetric voltage ramp rate control X Yang, HY Tseng, D Dutta US Patent 10,468,111, 2019 | 13 | 2019 |
| Concurrent programming of multiple cells for non-volatile memory devices X Yang, A Lee, GJ Hemink, K Oowada, T Miwa US Patent 10,978,156, 2021 | 12 | 2021 |
| Demonstration of Ultra‐Fast Switching in Nanometallic Resistive Switching Memory Devices X Yang Journal of Nanoscience 2016 (1), 8132701, 2016 | 12 | 2016 |
| Resistance switching devices based on amorphous insulator-metal thin films X Yang University of Pennsylvania, 2014 | 12 | 2014 |
| Memory disturb detection X Yang, HY Tseng, D Dutta US Patent 10,839,922, 2020 | 11 | 2020 |
