| Subthreshold 1-bit full adder cells in sub-100 nm technologies V Moalemi, A Afzali-Kusha IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 514-515, 2007 | 36 | 2007 |
| G4-FET modeling for circuit simulation by adaptive neuro-fuzzy training systems H Aghababa, B Ebrahimi, M Saremi, V Moalemi, B Forouzandeh IEICE Electronics Express 9 (10), 881-887, 2012 | 21 | 2012 |
| Subthreshold pass transistor logic for ultra-low power operation V Moalemi, A Afzali-Kusha IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 490-491, 2007 | 10 | 2007 |
| Subthreshold 1-bit Full Adder in 100nm Technologies V Moalemi, A Afzali-Kusha IEEE Computer Society Annual Symposium on VLSI, pp (1-2), 2007 | 4 | 2007 |
