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Florian Hirner
Florian Hirner
在 iaik.tugraz.at 的电子邮件经过验证
标题
引用次数
引用次数
年份
PROTEUS: A Tool to generate pipelined Number Theoretic Transform Architectures for FHE and ZKP applications.
F Hirner, AC Mert, SS Roy
IACR Cryptol. ePrint Arch. 2023, 267, 2023
92023
Aloha-he: A low-area hardware accelerator for client-side operations in homomorphic encryption
F Krieger, F Hirner, AC Mert, SS Roy
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024
22024
Proteus: A Pipelined NTT Architecture Generator
F Hirner, AC Mert, SS Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024
22024
Whipping the Multivariate-based MAYO Signature Scheme using Hardware Platforms
F Hirner, M Streibl, F Krieger, AC Mert, SS Roy
ACM Conference on Computer and Communications Security (CCS) 2024, 2024
2024
OpenNTT-An Automated Toolchain for Compiling High-Performance NTT Accelerators in FHE
F Krieger, F Hirner, AC Mert, SS Roy
2024 ACM/IEEE International Conference on Computer-Aided Design, 2024
2024
Whipping the MAYO Signature Scheme using Hardware Platforms
F Hirner, M Streibl, F Krieger, AC Mert, SS Roy
Cryptology ePrint Archive, 2023
2023
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