| Lab at home: Hardware kits for a digital design lab JP Oliver, F Haim IEEE Transactions on education 52 (1), 46-51, 2008 | 82 | 2008 |
| Clock gating and clock enable for FPGA power reduction JP Oliver, J Curto, D Bouvier, M Ramos, E Boemo 2012 VIII Southern Conference on Programmable Logic, 1-5, 2012 | 57 | 2012 |
| Wireless EEG system achieving high throughput and reduced energy consumption through lossless and near-lossless compression GD y Alvarez, F Favaro, F Lecumberry, A Martin, JP Oliver, J Oreggioni, ... IEEE transactions on biomedical circuits and systems 12 (1), 231-241, 2018 | 27 | 2018 |
| Power estimations vs. power measurements in Cyclone III devices JP Oliver, E Boemo 2011 VII southern conference on Programmable Logic (SPL), 87-90, 2011 | 22 | 2011 |
| Power estimations vs. power measurements in Spartan-6 devices JP Oliver, JP Acle, E Boemo 2014 IX southern conference on Programmable Logic (SPL), 1-5, 2014 | 18 | 2014 |
| Tracking the pipelining-power rule along the FPGA technical literature E Boemo, JP Oliver, G Caffarena Proceedings of the 10th FPGAworld Conference, 1-5, 2013 | 17 | 2013 |
| Wearable EEG via lossless compression G Dufort, F Favaro, F Lecumberry, Á Martín, JP Oliver, J Oreggioni, ... 2016 38th annual international conference of the IEEE engineering in …, 2016 | 16 | 2016 |
| Hardware lab at home possible with ultra low cost boards [logic design course] JP Oliver, F Haim, S Fernandez, J Rodríguez, P Rolando 2005 IEEE International Conference on Microelectronic Systems Education (MSE …, 2005 | 15 | 2005 |
| Self-reconfigurable constant multiplier for fpga J Hormigo, G Caffarena, JP Oliver, E Boemo ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6 (3), 1-17, 2013 | 8 | 2013 |
| Simenerg: the design of autonomous systems C Briozzo, G Casaravilla, R Chaer, JP Oliver UR. FING, 1996 | 8 | 1996 |
| Understanding the performance of elementary NLA kernels in fpgas F Favaro, JP Oliver, E Dufrechou, P Ezzatti 2020 IEEE International Parallel and Distributed Processing Symposium …, 2020 | 6 | 2020 |
| Exploring fpga Optimizations to Compute Sparse Numerical Linear Algebra Kernels F Favaro, E Dufrechou, P Ezzatti, JP Oliver Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2020 | 6 | 2020 |
| Diseño digital utilizando lógica programable: aplicaciones a la enseñanza JP Oliver | 6 | 2007 |
| Tools for design and evaluation of photovoltaic systems, III Congreso Internacional Energía G Casaravilla, R Chaer, J Oliver Ambiente e Innovación Tecnológica, Caracas, Venezuela, 1995 | 5 | 1995 |
| A low cost system for self measurements of power consumption in field programmable gate arrays JP Oliver, F Veirano, D Bouvier, E Boemo Journal of Low Power Electronics 13 (1), 1-9, 2017 | 4 | 2017 |
| Técnicas de bajo consumo en FPGAs JP Oliver | 4 | 2014 |
| Time-Power-Energy Balance of blas Kernels in Modern fpgas F Favaro, E Dufrechou, JP Oliver, P Ezzatti Latin American High Performance Computing Conference, 78-89, 2022 | 3 | 2022 |
| A drawing robot pipeline with artist-inspired execution J Arruti, M Ottavianelli, A Solari, P Monzón, P Musé, JP Oliver 2021 IEEE URUCON, 461-466, 2021 | 3 | 2021 |
| Hardware implementation of a multi-channel EEG lossless compression algorithm F Favaro, JP Oliver 2019 X Southern Conference on Programmable Logic (SPL), 69-73, 2019 | 3 | 2019 |
| A 64-channel wireless EEG recording system for wearable applications M Causa, F La Paz, S Radi, JP Oliver, L Steinfeld, J Oreggioni 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2018 | 3 | 2018 |
Federico FavaroUniversity of Padova在 dei.unipd.it 的电子邮件经过验证
