| SWIFT: Software implemented fault tolerance GA Reis, J Chang, N Vachharajani, R Rangan, DI August International Symposium on Code Generation and Optimization, 243-254, 2005 | 1040 | 2005 |
| Automatic thread extraction with decoupled software pipelining G Ottoni, R Rangan, A Stoler, DI August 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05 …, 2005 | 391 | 2005 |
| RIFLE: An architectural framework for user-centric information-flow security N Vachharajani, MJ Bridges, J Chang, R Rangan, G Ottoni, JA Blome, ... 37th International Symposium on Microarchitecture (MICRO-37'04), 243-254, 2004 | 386 | 2004 |
| Computing architectural vulnerability factors for address-based structures A Biswas, P Racunas, R Cheveresan, J Emer, SS Mukherjee, R Rangan 32nd International Symposium on Computer Architecture (ISCA'05), 532-543, 2005 | 302 | 2005 |
| Design and evaluation of hybrid fault-detection systems GA Reis, J Chang, N Vachharajani, R Rangan, DI August, SS Mukherjee ACM SIGARCH Computer Architecture News 33 (2), 148-159, 2005 | 258 | 2005 |
| Decoupled software pipelining with the synchronization array R Rangan, N Vachharajani, M Vachharajani, DI August Proceedings. 13th International Conference on Parallel Architecture and …, 2004 | 213 | 2004 |
| Software-controlled fault tolerance GA Reis, J Chang, N Vachharajani, R Rangan, DI August, SS Mukherjee ACM Transactions on Architecture and Code Optimization (TACO) 2 (4), 366-396, 2005 | 195 | 2005 |
| Speculative decoupled software pipelining N Vachharajani, R Rangan, E Raman, MJ Bridges, G Ottoni, DI August 16th International Conference on Parallel Architecture and Compilation …, 2007 | 186 | 2007 |
| Spice: speculative parallel iteration chunk execution E Raman, N Va hharajani, R Rangan, DI August Proceedings of the 6th annual IEEE/ACM international symposium on Code …, 2008 | 49 | 2008 |
| Hardware-modulated parallelism in chip multiprocessors J Chen, P Juang, K Ko, G Contreras, D Penry, R Rangan, A Stoler, ... ACM SIGARCH Computer Architecture News 33 (4), 54-63, 2005 | 44 | 2005 |
| Performance scalability of decoupled software pipelining R Rangan, N Vachharajani, G Ottoni, DI August ACM Transactions on Architecture and Code Optimization (TACO) 5 (2), 1-25, 2008 | 40 | 2008 |
| Support for high-frequency streaming in CMPs R Rangan, N Vachharajani, A Stoler, G Ottoni, DI August, GZN Cai 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006 | 39 | 2006 |
| From sequential programs to concurrent threads G Ottoni, R Rangan, A Stoler, MJ Bridges, DI August IEEE Computer Architecture Letters 5 (1), 6-9, 2006 | 39 | 2006 |
| Using hardware interrupts to drive dynamic binary code recompilation MW Stephenson, R Rangan US Patent 8,453,129, 2013 | 18 | 2013 |
| Predication supporting code generation by indicating path associations of symmetrically placed write instructions R Rangan, MW Stephenson, L Zhang US Patent 9,262,140, 2016 | 15 | 2016 |
| Locality-Aware CTA Scheduling for Gaming Applications A Ukarande, S Patidar, R Rangan ACM Transactions on Architecture and Code Optimization (TACO) 19 (1), 1-26, 2021 | 11 | 2021 |
| Pipelined multithreading transformations and support mechanisms R Rangan Dissertation Abstracts International 68 (03), 2007 | 11 | 2007 |
| Zeroploit: Exploiting Zero Valued Operands in Interactive Gaming Applications R Rangan, M Stephenson, A Ukarande, S Murthy, V Agarwal, ... ACM Transactions on Architecture and Code Optimization (TACO) 17 (3), 26, 2020 | 10 | 2020 |
| Predication support in an out-of-order processor by selectively executing ambiguously renamed write operations R Rangan, MW Stephenson, L Zhang US Patent 7,886,132, 2011 | 10 | 2011 |
| Techniques for predicated execution in an out-of-order processor R Rangan, WE Speight, MW Stephenson, L Zhang US Patent 9,946,550, 2018 | 8 | 2018 |
David I. AugustComputer Science, Princeton University在 princeton.edu 的电子邮件经过验证
