| Design and implementation of a three-operand multiplier through carbon nanotube technology MR Reshadinezhad, N Charmchi, K Navi International Journal of Modern Education and Computer Science 7 (9), 44-51, 2015 | 12 | 2015 |
| Energy efficient design of four-operand multiplier architecture using cntfet technology N Charmchi, MR Reshadinezhad Sumy State University, 2018 | 10 | 2018 |
| A Novel High-speed Two-operand Multiplier using CNFET Technology N Charmchi, M Reshadinezhad International Journal of Advanced Information Science and Technology 43 (43 …, 2015 | 4 | 2015 |
| Compressed cache layout aware prefetching N Charmchi, C Collange, A Seznec 2019 31st International Symposium on Computer Architecture and High …, 2019 | 2 | 2019 |
| Toward compression-aware prefetching N Charmchi, C Collange COMPAS 2019-Conférence d'informatique en Parallélisme, Architecture et …, 2019 | 1 | 2019 |
| An Energy Efficient Four-operand Multiplier Architecture using CNTFET Technology MR Reshadinezhad, N Charmchi, M Masood | | |
| Optimization of MVL Logic Gates Using Carbon Nanotube Field Effect Transistors MS Mohammadi, N Charmchi, MR Reshadinezhad | | |
