| On the hardware-software partitioning problem: System modeling and partitioning techniques M López-Vallejo, JC López ACM Transactions on Design Automation of Electronic Systems (TODAES) 8 (3 …, 2003 | 198 | 2003 |
| Design techniques for Xilinx Virtex FPGA configuration memory scrubbers I Herrera-Alzu, M Lopez-Vallejo IEEE transactions on Nuclear Science 60 (1), 376-385, 2013 | 121 | 2013 |
| Implementing FFT-based digital channelized receivers on FPGA platforms MA Sanchez, M Garrido, M Lopez-Vallejo, J Grajal IEEE Transactions on Aerospace and Electronic Systems 44 (4), 1567-1585, 2008 | 105 | 2008 |
| SPICE compact modeling of bipolar/unipolar memristor switching governed by electrical thresholds F García-Redondo, RP Gowers, A Crespo-Yepes, M López-Vallejo, ... IEEE Transactions on Circuits and Systems I: Regular Papers 63 (8), 1255-1264, 2016 | 74 | 2016 |
| A nanowatt smart temperature sensor for dynamic thermal management P Ituero, JL Ayala, M Lopez-Vallejo IEEE Sensors Journal 8 (12), 2036-2043, 2008 | 65 | 2008 |
| A co-design methodology based on formal specification and high-level estimation C Carreras, JC Lopez, ML Lopez, C Delgado-Kloos, N Martinez, ... Proceedings of 4th International Workshop on Hardware/Software Co-Design …, 1996 | 63 | 1996 |
| Power-aware compilation for register file energy reduction JL Ayala, A Veidenbaum, M López-Vallejo International Journal of Parallel Programming 31, 451-467, 2003 | 60 | 2003 |
| Real-time low-complexity automatic modulation classifier for pulsed radar signals V Iglesias, J Grajal, P Royer, MA Sanchez, M Lopez-Vallejo, ... IEEE Transactions on Aerospace and Electronic Systems 51 (1), 108-126, 2015 | 56 | 2015 |
| Implementation of a real-time spectrum analyzer on FPGA platforms V Iglesias, J Grajal, MA Sánchez, M López-Vallejo IEEE Transactions on Instrumentation and Measurement 64 (2), 338-355, 2014 | 52 | 2014 |
| A 4096-point radix-4 memory-based FFT using DSP slices JG Mario Garrido, Miguel Ángel Sánchez, María Luisa López-Vallejo IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 375-379, 2017 | 49* | 2017 |
| Digital channelised receivers on FPGAs platforms MA Sanchez, M Garrido, M López-Vallejo, J Grajal, C López-Barrio IEEE International Radar Conference, 2005., 816-821, 2005 | 41 | 2005 |
| Design of a pipelined hardware architecture for real-time neural network computations JL Ayala, AG Lomeña, M López-Vallejo, A Fernández The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002 …, 2002 | 40 | 2002 |
| Constraint-driven system partitioning ML López-Vallejo, J Grajal, JC López Proceedings of the conference on Design, automation and test in Europe, 411-416, 2000 | 35 | 2000 |
| Opportunities and challenges of ambient radio-frequency energy harvesting X Zhang, J Grajal, M López-Vallejo, E McVay, T Palacios Joule 4 (6), 1148-1152, 2020 | 33 | 2020 |
| Energy aware register file implementation through instruction predecode JL Ayala, M López-Vallejo, A Veidenbaum, CA López Proceedings IEEE International Conference on Application-Specific Systems …, 2003 | 28 | 2003 |
| Building memristor applications: From device model to circuit design F García-Redondo, M López-Vallejo, P Ituero IEEE Transactions on Nanotechnology 13 (6), 1154-1162, 2014 | 25 | 2014 |
| Real time FPGA implementation of an automatic modulation classifier for electronic warfare applications J Grajal, O Yeste-Ojeda, MA Sanchez, M Garrido, M López-Vallejo 2011 19th European Signal Processing Conference, 1514-1518, 2011 | 25 | 2011 |
| Leakage-based on-chip thermal sensor for CMOS technology P Ituero, JL Ayala, M Lopez-Vallejo 2007 IEEE International Symposium on Circuits and Systems (ISCAS), 3327-3330, 2007 | 24 | 2007 |
| System design framework and methodology for Xilinx Virtex FPGA configuration scrubbers I Herrera-Alzu, M Lopez-Vallejo IEEE Transactions on Nuclear Science 61 (1), 619-629, 2014 | 20 | 2014 |
| Floating-point exponentiation units for reconfigurable computing F De Dinechin, P Echeverria, M López-Vallejo, B Pasca ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6 (1), 1-15, 2013 | 20 | 2013 |
Pablo ItueroAssociate Professor, Universidad Politecnica de Madrid在 die.upm.es 的电子邮件经过验证
