Learning Memory Access Patterns M Hashemi, K Swersky, JA Smith, G Ayers, H Litz, J Chang, C Kozyrakis, ... arXiv preprint arXiv:1803.02329, 2018 | 244 | 2018 |
Reflex: Remote flash≈ local flash A Klimovic, H Litz, C Kozyrakis ACM SIGARCH Computer Architecture News 45 (1), 345-359, 2017 | 202 | 2017 |
High frequency trading acceleration using FPGAs C Leber, B Geib, H Litz 2011 21st International Conference on Field Programmable Logic and …, 2011 | 165 | 2011 |
Selecta: Heterogeneous cloud storage configuration for data analytics A Klimovic, H Litz, C Kozyrakis 2018 USENIX Annual Technical Conference (USENIX ATC 18), 759-773, 2018 | 114 | 2018 |
Asmdb: understanding and mitigating front-end stalls in warehouse-scale computers G Ayers, NP Nagendra, DI August, HK Cho, S Kanev, C Kozyrakis, ... Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 90 | 2019 |
Making pull-based graph processing performant S Grossman, H Litz, C Kozyrakis ACM SIGPLAN Notices 53 (1), 246-260, 2018 | 77 | 2018 |
Classifying memory access patterns for prefetching G Ayers, H Litz, C Kozyrakis, P Ranganathan Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 68 | 2020 |
SI-TM: Reducing transactional memory abort rates through snapshot isolation H Litz, D Cheriton, A Firoozshahian, O Azizi, JP Stevenson Proceedings of the 19th international conference on Architectural support …, 2014 | 56 | 2014 |
The HTX-board: a rapid prototyping station H Fröning, M Nüssle, D Slogsnat, H Litz, U Brüning 3rd annual FPGAworld Conference, 2006 | 48 | 2006 |
I-spy: Context-driven conditional instruction prefetching with coalescing TA Khan, A Sriraman, J Devietti, G Pokam, H Litz, B Kasikci 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 46 | 2020 |
VELO: A novel communication engine for ultra-low latency message transfers H Litz, H Froening, M Nuessle, U Bruening 2008 37th International Conference on Parallel Processing, 238-245, 2008 | 45 | 2008 |
Understanding memory access patterns for prefetching P Braun, H Litz International Workshop on AI-assisted Design for Architecture (AIDArc), held …, 2019 | 43 | 2019 |
Efficient hardware support for the partitioned global address space H Fröning, H Litz 2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010 | 41 | 2010 |
Learning i/o access patterns to improve prefetching in ssds C Chakraborttii, H Litz Joint European Conference on Machine Learning and Knowledge Discovery in …, 2020 | 37 | 2020 |
On achieving high message rates H Fröning, M Nüssle, H Litz, C Leber, U Brüning 2013 13th IEEE/ACM International Symposium on Cluster, Cloud, and Grid …, 2013 | 35 | 2013 |
Ripple: Profile-guided instruction cache replacement for data center applications TA Khan, D Zhang, A Sriraman, J Devietti, G Pokam, H Litz, B Kasikci 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 32 | 2021 |
SSP: Eliminating redundant writes in failure-atomic NVRAMs via shadow sub-paging Y Ni, J Zhao, H Litz, D Bittman, EL Miller Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 32 | 2019 |
CIRCUIT ARRANGEMENT FOR CONNECTION INTERFACE HL Mondrian Nussle, Benjamin Geib US Patent 20140207881A1, 2014 | 31* | 2014 |
Improving the accuracy, adaptability, and interpretability of SSD failure prediction models C Chakraborttii, H Litz Proceedings of the 11th ACM Symposium on Cloud Computing, 120-133, 2020 | 29 | 2020 |
APT-GET: profile-guided timely software prefetching S Jamilan, TA Khan, G Ayers, B Kasikci, H Litz Proceedings of the Seventeenth European Conference on Computer Systems, 747-764, 2022 | 24 | 2022 |