| Understanding sources of inefficiency in general-purpose chips R Hameed, W Qadeer, M Wachs, O Azizi, A Solomatnikov, BC Lee, ... ACM SIGARCH-Computer Architecture News 38 (3), 37, 2010 | 734 | 2010 |
| CPU DB: Recording Microprocessor History: With this open database, you can mine microprocessor trends over the past 40 years. A Danowitz, K Kelley, J Mao, JP Stevenson, M Horowitz Queue 10 (4), 10-27, 2012 | 292 | 2012 |
| Programming heterogeneous systems from an image processing DSL J Pu, S Bell, X Yang, J Setter, S Richardson, J Ragan-Kelley, M Horowitz ACM Transactions on Architecture and Code Optimization (TACO) 14 (3), 1-25, 2017 | 158 | 2017 |
| Dark memory and accelerator-rich system optimization in the dark silicon era A Pedram, S Richardson, M Horowitz, S Galal, S Kvatinsky IEEE Design & Test 34 (2), 39-50, 2016 | 151 | 2016 |
| Rethinking digital design: Why design must change O Shacham, O Azizi, M Wachs, W Qadeer, Z Asgar, K Kelley, ... IEEE micro 30 (6), 9-24, 2010 | 132 | 2010 |
| Caching function results: Faster arithmetic by avoiding unnecessary computation SE Richardson Sun Microsystems Laboratories Technical Report SMLI TR-92-1, 1992 | 119 | 1992 |
| Exploiting trivial and redundant computation SE Richardson Proceedings of IEEE 11th Symposium on Computer Arithmetic, 220-227, 1993 | 96 | 1993 |
| A systematic approach to blocking convolutional neural networks X Yang, J Pu, BB Rister, N Bhagdikar, S Richardson, S Kvatinsky, ... arXiv preprint arXiv:1606.04209, 2016 | 79 | 2016 |
| Avoiding game over: Bringing design to the next level O Shacham, M Wachs, A Danowitz, S Galal, J Brunhaver, W Qadeer, ... Proceedings of the 49th Annual Design Automation Conference, 623-629, 2012 | 61 | 2012 |
| Method and apparatus for optimizing complex arithmetic units for trivial operands S Richardson US Patent 5,262,973, 1993 | 60 | 1993 |
| Interprocedural analysis vs. procedure integration S Richardson, M Ganapathi Information Processing Letters 32 (3), 137-142, 1989 | 57 | 1989 |
| Interprocedural optimization: Experimental results S Richardson, M Ganapathi Software: Practice and Experience 19 (2), 149-169, 1989 | 51 | 1989 |
| Evaluating programmable architectures for imaging and vision applications A Vasilyev, N Bhagdikar, A Pedram, S Richardson, S Kvatinsky, ... 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 47 | 2016 |
| Storing data in memory P Keltcher, S Richardson US Patent 6,782,453, 2004 | 37 | 2004 |
| A memory system design framework: creating smart memories A Firoozshahian, A Solomatnikov, O Shacham, Z Asgar, S Richardson, ... Proceedings of the 36th annual international symposium on Computer …, 2009 | 35 | 2009 |
| Verification of chip multiprocessor memory systems using a relaxed scoreboard O Shacham, M Wachs, A Solomatnikov, A Firoozshahian, S Richardson, ... 2008 41st IEEE/ACM International Symposium on Microarchitecture, 294-305, 2008 | 35 | 2008 |
| System and method for a chip generator O Shacham, M Horowitz, S Richardson US Patent 8,966,413, 2015 | 34 | 2015 |
| Result cache for complex arithmetic units S Richardson US Patent 5,260,898, 1993 | 34 | 1993 |
| Code optimization across procedures S Richardson, M Ganapathi Computer 22 (2), 42-50, 1989 | 34 | 1989 |
| MPOC: A chip multiprocessor for embedded systems S Richardson HP Laboratories Technical Report HPL-2002-186, 2002 | 31 | 2002 |
Mark HorowitzProfessor of Electrical Engineering and Computer Science在 ee.stanford.edu 的电子邮件经过验证
