| A low power 12-bit 1-kS/s SAR ADC for biomedical signal processing W Mao, Y Li, CH Heng, Y Lian IEEE Transactions on Circuits and Systems I: Regular Papers 66 (2), 477-488, 2018 | 61 | 2018 |
| High dynamic performance current-steering DAC design with nested-segment structure W Mao, Y Li, CH Heng, Y Lian IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (5), 995-999, 2018 | 47 | 2018 |
| A 74-μW 11-Mb/s Wireless Vital Signs Monitoring SoC for Three-Lead ECG, Respiration Rate, and Body Temperature Y Luo, KH Teng, Y Li, W Mao, Y Lian, CH Heng IEEE transactions on biomedical circuits and systems 13 (5), 907-917, 2019 | 36 | 2019 |
| An ultra-low voltage comparator with improved comparison time and reduced offset voltage Y Li, W Mao, Z Zhang, Y Lian 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 407-410, 2014 | 29 | 2014 |
| Recent advances in ion‐sensitive field‐effect transistors for biosensing applications X Ma, R Peng, W Mao, Y Lin, H Yu Electrochemical Science Advances 3 (3), e2100163, 2023 | 27 | 2023 |
| A fast transient LDO based on dual loop FVF with high PSRR L Wang, W Mao, C Wu, A Chang, Y Lian 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 99-102, 2016 | 23 | 2016 |
| A configurable floating-point multiple-precision processing element for HPC and AI converged computing W Mao, K Li, Q Cheng, L Dai, B Li, X Xie, H Li, L Lin, H Yu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (2), 213-226, 2021 | 19 | 2021 |
| A 93μW 11Mbps wireless vital signs monitoring SoC with 3-lead ECG, bio-impedance, and body temperature Y Luo, KH Teng, Y Li, W Mao, CH Heng, Y Lian 2017 IEEE Asian solid-state circuits conference (A-SSCC), 29-32, 2017 | 19 | 2017 |
| A vector systolic accelerator for multi-precision floating-point high-performance computing K Li, W Mao, J Zhou, B Li, Z Yang, S Yang, L Du, S Huang, H Yu IEEE Transactions on Circuits and Systems II: Express Briefs 69 (10), 4123-4127, 2022 | 12 | 2022 |
| Energy-efficient machine learning accelerator for binary neural networks W Mao, Z Xiao, P Xu, H Ren, D Liu, S Zhao, F An, H Yu Proceedings of the 2020 on Great Lakes Symposium on VLSI, 77-82, 2020 | 12 | 2020 |
| A high performance multi-bit-width booth vector systolic accelerator for NAS optimized deep learning neural networks M Huang, Y Liu, C Man, K Li, Q Cheng, W Mao, H Yu IEEE Transactions on Circuits and Systems I: Regular Papers 69 (9), 3619-3631, 2022 | 10 | 2022 |
| A precision-scalable energy-efficient bit-split-and-combination vector systolic accelerator for NAS-optimized DNNs on edge K Li, J Zhou, Y Wang, J Luo, Z Yang, S Yang, W Mao, M Huang, H Yu 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 730-735, 2022 | 10 | 2022 |
| Advances in neural recording and stimulation integrated circuits J Li, X Liu, W Mao, T Chen, H Yu Frontiers in Neuroscience 15, 663204, 2021 | 9 | 2021 |
| A video-based fall detection network by spatio-temporal joint-point model on edge devices Z Guan, S Li, Y Cheng, C Man, W Mao, N Wong, H Yu 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 422-427, 2021 | 8 | 2021 |
| Area efficient non‐fractional binary‐weighted split‐capacitive‐array DAC for successive‐approximation‐register ADC W Mao, Y Li, CH Heng, Y Lian Electronics Letters 53 (7), 452-454, 2017 | 8 | 2017 |
| An energy-efficient mixed-bit CNN accelerator with column parallel readout for ReRAM-based in-memory computing D Liu, H Zhou, W Mao, J Liu, Y Han, C Man, Q Wu, Z Guo, M Huang, ... IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12 (4 …, 2022 | 7 | 2022 |
| A fully integrated power converter for thermoelectric energy harvesting with 81% peak efficiency and 6.4-mV minimum input voltage J Tao, W Mao, Z Luo, L Zeng, CH Heng IEEE Transactions on Power Electronics 37 (5), 4968-4972, 2021 | 7 | 2021 |
| Ant-unet: Accurate and noise-tolerant segmentation for pathology image processing Y Chen, T Li, Q Zhang, W Mao, N Guan, M Tian, H Yu, C Zhuo ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (2), 1-17, 2021 | 6 | 2021 |
| An Energy-Efficient Mixed-Bitwidth Systolic Accelerator for NAS-Optimized Deep Neural Networks W Mao, L Dai, K Li, Q Cheng, Y Wang, L Du, S Luo, M Huang, H Yu IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1-13, 2022 | 5 | 2022 |
| A reconfigurable multiple-precision floating-point dot product unit for high-performance computing W Mao, K Li, X Xie, S Zhao, H Li, H Yu 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 5 | 2021 |
Hao Yu （余浩）SUSTech（南方科技大学）在 sustech.edu.cn 的电子邮件经过验证
