Wireless power transfer for vehicular applications: Overview and challenges D Patil, MK McDonough, JM Miller, B Fahimi, PT Balsara IEEE Transactions on Transportation Electrification 4 (1), 3-37, 2017 | 917 | 2017 |
All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS RB Staszewski, K Muhammad, D Leipold, CM Hung, YC Ho, JL Wallberg, ... IEEE Journal of Solid-State Circuits 39 (12), 2278-2291, 2004 | 766 | 2004 |
1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS RB Staszewski, S Vemulapalli, P Vallur, J Wallberg, PT Balsara IEEE Transactions on Circuits and Systems II: Express Briefs 53 (3), 220-224, 2006 | 479 | 2006 |
All-digital frequency synthesizer in deep-submicron CMOS RB Staszewski, PT Balsara John Wiley & Sons, 2006 | 429 | 2006 |
Phase-domain all-digital phase-locked loop RB Staszewski, PT Balsara IEEE Transactions on Circuits and Systems II: Express Briefs 52 (3), 159-163, 2005 | 276 | 2005 |
Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS process RB Staszewski, D Leipold, K Muhammad, PT Balsara IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2003 | 272 | 2003 |
A first multigigahertz digitally controlled oscillator for wireless applications RB Staszewski, CM Hung, D Leipold, PT Balsara IEEE Transactions on Microwave theory and techniques 51 (11), 2154-2164, 2003 | 224 | 2003 |
Low-power design techniques for high-performance CMOS adders U Ko, T Balsara, W Lee IEEE Transactions on Very Large Scale Integration (VLSI) Systems 3 (2), 327-333, 1995 | 184 | 1995 |
Event-driven simulation and modeling of phase noise of an RF oscillator RB Staszewski, C Fernando, PT Balsara IEEE Transactions on Circuits and Systems I: Regular Papers 52 (4), 723-733, 2005 | 170 | 2005 |
Performance of CMOS differential circuits P Ng, PT Balsara, D Steiss IEEE Journal of Solid-State Circuits 31 (6), 841-846, 1996 | 159 | 1996 |
All-digital PLL with ultra fast settling RB Staszewski, PT Balsara IEEE Transactions on Circuits and Systems II: express briefs 54 (2), 181-185, 2007 | 155 | 2007 |
VLSI architecture for matrix inversion using modified Gram-Schmidt based QR decomposition CK Singh, SH Prasad, PT Balsara 20th International Conference on VLSI Design held jointly with 6th …, 2007 | 153 | 2007 |
All-digital phase-domain TX frequency synthesizer for Bluetooth radios in 0.13/spl mu/m CMOS RB Staszewski, CM Hung, K Maggio, J Wallberg, D Leipold, PT Balsara 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004 | 151 | 2004 |
High-performance energy-efficient D-flip-flop circuits U Ko, PT Balsara IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 94-98, 2000 | 142 | 2000 |
A wide-range, high-resolution, compact, CMOS time to digital converter V Ramakrishnan, PT Balsara 19th International Conference on VLSI Design held jointly with 5th …, 2006 | 127 | 2006 |
Input–output linearization of a boost converter with mixed load (constant voltage load and constant power load) S Arora, P Balsara, D Bhatia IEEE Transactions on Power Electronics 34 (1), 815-825, 2018 | 107 | 2018 |
High performance low power array multiplier using temporal tiling SS Mahant-Shetti, PT Balsara, C Lemonds IEEE Transactions on very large scale integration (VLSI) systems 7 (1), 121-124, 1999 | 102 | 1999 |
Delay balanced multipliers for low power/low voltage DSP core T Sakuta, W Lee, PT Balsara 1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers, 36-37, 1995 | 99 | 1995 |
TDC-based frequency synthesizer for wireless applications RB Staszewski, D Leipold, CM Hung, PT Balsara 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of …, 2004 | 96 | 2004 |
I/Q mismatch compensation using adaptive decorrelation in a low-IF receiver in 90-nm CMOS process I Elahi, K Muhammad, PT Balsara IEEE Journal of Solid-State Circuits 41 (2), 395-404, 2006 | 92 | 2006 |