Parameter variation tolerance and error resiliency: New design paradigm for the nanoscale era S Ghosh, K Roy Proceedings of the IEEE 98 (10), 1718-1751, 2010 | 230 | 2010 |
Emerging trends in design and applications of memory-based computing and content-addressable memories R Karam, R Puri, S Ghosh, S Bhunia Proceedings of the IEEE 103 (8), 1311-1330, 2015 | 193 | 2015 |
CRISTA: A new paradigm for low-power, variation-tolerant, and adaptive circuit synthesis using critical path isolation S Ghosh, S Bhunia, K Roy IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007 | 151* | 2007 |
The hardware trojan war S Bhunia, M Tehranipoor Cham,, Switzerland: Springer, 2018 | 129 | 2018 |
QURE: Qubit re-allocation in noisy intermediate-scale quantum computers A Ash-Saki, M Alam, S Ghosh Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 88 | 2019 |
How secure are printed circuit boards against trojan attacks? S Ghosh, A Basak, S Bhunia IEEE Design & Test 32 (2), 7-16, 2014 | 87 | 2014 |
Low-power Variation-tolerant Design in Nanometer Silicon S Bhunia Springer Verlag, 2010 | 75 | 2010 |
Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking S Ghosh, D Mohapatra, G Karakonstantis, K Roy IEEE transactions on very large scale integration (VLSI) systems 18 (9 …, 2009 | 73 | 2009 |
MUQUT: Multi-constraint quantum circuit mapping on NISQ computers D Bhattacharjee, AA Saki, M Alam, A Chattopadhyay, S Ghosh 2019 IEEE/ACM international conference on computer-aided design (ICCAD), 1-7, 2019 | 71* | 2019 |
Spintronics and security: Prospects, vulnerabilities, attack models, and preventions S Ghosh Proceedings of the IEEE 104 (10), 1864-1893, 2016 | 69 | 2016 |
Circuit compilation methodologies for quantum approximate optimization algorithm M Alam, A Ash-Saki, S Ghosh 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 68 | 2020 |
13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology F Hamzaoglu, U Arslan, N Bisnik, S Ghosh, MB Lal, N Lindert, ... 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 67 | 2014 |
Quantum generative models for small molecule drug discovery J Li, RO Topaloglu, S Ghosh IEEE transactions on quantum engineering 2, 1-8, 2021 | 62 | 2021 |
Impact of process-variations in STTRAM and adaptive boosting for robustness S Motaman, S Ghosh, N Rathi 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 58 | 2015 |
Analysis of quantum approximate optimization algorithm under realistic noise in superconducting qubits M Alam, A Ash-Saki, S Ghosh arXiv preprint arXiv:1907.09631, 2019 | 52 | 2019 |
A novel on-chip delay measurement hardware for efficient speed-binning A Raychowdhury, S Ghosh, K Roy 11th IEEE International On-Line Testing Symposium, 287-292, 2005 | 52 | 2005 |
Quantum puf for security and trust in quantum computing K Phalak, A Ash-Saki, M Alam, RO Topaloglu, S Ghosh IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (2 …, 2021 | 51 | 2021 |
A novel delay fault testing methodology using low-overhead built-in delay sensor S Ghosh, S Bhunia, A Raychowdhury, K Roy IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 51 | 2006 |
A novel low overhead fault tolerant Kogge-Stone adder using adaptive clocking S Ghosh, P Ndai, K Roy Proceedings of the conference on Design, automation and test in Europe, 366-371, 2008 | 50 | 2008 |
A novel threshold voltage defined switch for circuit camouflaging IR Nirmala, D Vontela, S Ghosh, A Iyengar 2016 21th IEEE European Test Symposium (ETS), 1-2, 2016 | 49 | 2016 |