| Code compression based on operand factorization G Araujo, P Centoducatte, M Cortes, R Pannain Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998 | 81 | 1998 |
| Uma arquitetura de ambiente colaborativo para o aprendizado de programação CM Tobar, JLG Rosa, JMA Coello, R Pannain Brazilian Symposium on Computers in Education (Simpósio Brasileiro de …, 2001 | 54 | 2001 |
| Expression-tree-based algorithms for code compression on embedded RISC architectures G Araujo, P Centoducatte, R Azevedo, R Pannain IEEE transactions on very large scale integration (VLSI) systems 8 (5), 530-533, 2000 | 39 | 2000 |
| Compressed code execution on DSP architectures P Centoducatte, G Araujo, R Pannain Proceedings 12th International Symposium on System Synthesis, 56-61, 1999 | 16 | 1999 |
| Sparc16: A new compression approach for the sparc architecture LL Ecco, BC Lopes, EC Xavier, R Pannain, P Centoducatte, ... 2009 21st International Symposium on Computer Architecture and High …, 2009 | 12 | 2009 |
| Compressão de codigo de programa usando fatoração de operandos. R Pannain University of Campinas, Brazil, 1999 | 5 | 1999 |
| Code compression using operand factorization G Araujo, P Centoducatte, M Cortes, R Pannain Proceedings of the International Symposium on Microarchitecture, 1998 | 5 | 1998 |
| Um estudo de metricas de similaridade em sistemas baseados em casos aplicados a area da saude MRFM Julio [sn], 2005 | 3 | 2005 |
| DONUTS: An efficient method for checkpointing in non‐volatile memories K Kruger, R Pannain, R Azevedo Concurrency and Computation: Practice and Experience 35 (18), e7574, 2023 | 2 | 2023 |
| Organização básica de computadores e linguagem de montagem R Pannain, D Junior, FH Behrens Elsevier, 2012 | 1 | 2012 |
| Using operand factorization to compress DSP programs R Pannain, P Centoducatte, G Araujo Anais do XI Simpósio de Arquitetura de Computadores e Processamento de Alto …, 1999 | 1 | 1999 |
| Using Logging-on-Write to Improve Non-Volatile Memory Checkpoints via Processing-in-Memory K Kruger, R Pannain, R Azevedo 2023 IEEE 35th International Symposium on Computer Architecture and High …, 2023 | | 2023 |
| DONUTS: Um Eficiente Método de Checkpointing em Memórias Nao Voláteis K Kruger, R Azevedo, R Pannain Anais do XXII Simpósio em Sistemas Computacionais de Alto Desempenho, 120-131, 2021 | | 2021 |
| Enabling OpenMP task parallelism on Multi-FPGAs= Habilitando o paralelismo de tarefas do OpenMP em Multi-FPGAs RS Nepomuceno [sn], 2021 | | 2021 |
| Bringing Energy Information to the Instruction Set B Bonotto, L Wanner, R Pannain, R Azevedo 2020 X Brazilian Symposium on Computing Systems Engineering (SBESC), 1-8, 2020 | | 2020 |
| DrPin: A dynamic binary instumentator for multiple processor architectures LF Antonioli, R Pannain, R Azevedo Anais do XXI Simpósio em Sistemas Computacionais de Alto Desempenho, 251-262, 2020 | | 2020 |
| Organização Básica de Computadores e Linguagem de Montagem D Junior, F Behrens, R Pannain Elsevier Brasil, 2013 | | 2013 |
| IC-UNICAMP P Centoducatte, G Araujo, R Pannain, I Campinas System Synthesis: Proceedings: 12th International Symposium on System …, 1999 | | 1999 |
| Sistema grafico de entrada de dados para simuladores logicos R Pannain [sn], 1988 | | 1988 |
| 2023 IEEE 35th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)| 979-8-3503-0548-7/23/$31.00© 2023 IEEE| DOI: 10.1109/SBAC-PAD59825 … BS Alves, MAZ Alves, R Azevedo, MW Azhar, N Bain, CHS Barbosa, ... | | |
Guido AraujoIC-UNICAMP在 ic.unicamp.br 的电子邮件经过验证
