| CMOS SRAM circuit design and parametric test in nano-scaled technologies: process-aware SRAM design and test A Pavlov, M Sachdev Springer Science & Business Media, 2008 | 377 | 2008 |
| Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors J Tschanz, S Narendra, Z Chen, S Borkar, M Sachdev, V De Proceedings of the 2001 international symposium on Low power electronics and …, 2001 | 347 | 2001 |
| A soft error tolerant 10T SRAM bit-cell with differential read capability SM Jahinuzzaman, DJ Rennie, M Sachdev IEEE Transactions on Nuclear Science 56 (6), 3768-3773, 2009 | 302 | 2009 |
| A digitally programmable delay element: design and analysis M Maymandi-Nejad, M Sachdev IEEE transactions on very large scale integration (VLSI) systems 11 (5), 871-878, 2003 | 246 | 2003 |
| A monotonic digitally controlled delay element M Maymandi-Nejad, M Sachdev IEEE journal of solid-state circuits 40 (11), 2212-2219, 2005 | 222 | 2005 |
| Impact of self-heating effect on long-term reliability and performance degradation in CMOS circuits O Semenov, A Vassighi, M Sachdev IEEE transactions on device and materials reliability 6 (1), 17-27, 2006 | 199 | 2006 |
| Thermal and power management of integrated circuits A Vassighi, M Sachdev Springer Science & Business Media, 2006 | 151 | 2006 |
| Variation-aware adaptive voltage scaling system M Elgebaly, M Sachdev IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (5), 560-571, 2007 | 144 | 2007 |
| ESD protection device and circuit design for advanced CMOS technologies O Semenov, H Sarbishaei, M Sachdev Springer Science & Business Media, 2008 | 135 | 2008 |
| A method to derive an equation for the oscillation frequency of a ring oscillator S Docking, M Sachdev IEEE Transactions on Circuits and Systems I: Fundamental Theory and …, 2003 | 132 | 2003 |
| Defect detection with transient current testing and its potential for deep sub-micron CMOS ICs M Sachdev, P Janssen, V Zieren Proceedings International Test Conference 1998 (IEEE Cat. No. 98CH36270 …, 1998 | 124 | 1998 |
| An analytical model for soft error critical charge of nanometric SRAMs SM Jahinuzzaman, M Sharifkhani, M Sachdev IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (9 …, 2009 | 120 | 2009 |
| Robust and Efficient dynamic voltage scaling for portable devices I Kang, K Ethirajan, ML Severson, M Elgebaly, M Sachdev, A Fahim US Patent 7,583,555, 2009 | 109 | 2009 |
| A new SEC-DED error correction code subclass for adjacent MBU tolerance in embedded memory A Neale, M Sachdev IEEE Transactions on Device and Materials Reliability 13 (1), 223-230, 2012 | 103 | 2012 |
| Deep sub-micron i/sub ddq/testing: issues and solutions M Sachdev Proceedings European Design and Test Conference. ED & TC 97, 271-278, 1997 | 102 | 1997 |
| 1-bit quantiser with rail to rail input range for sub-1 V ΔΣ modulators M Maymandi-Nejad, M Sachdev Electronics Letters 39 (12), 894-895, 2003 | 99 | 2003 |
| Defect oriented testing for CMOS analog and digital circuits M Sachdev Springer Science & Business Media, 2013 | 94 | 2013 |
| Industrial relevance of analog IFA: A fact or a fiction M Sachdev, B Atzema Proceedings of 1995 IEEE International Test Conference (ITC), 61-70, 1995 | 89 | 1995 |
| Defect-oriented testing for nano-metric CMOS VLSI circuits M Sachdev, JP De Gyvez Springer Science & Business Media, 2007 | 85 | 2007 |
| Low power, testable dual edge triggered flip-flops RP Llopis, M Sachdev Proceedings of 1996 International Symposium on Low Power Electronics and …, 1996 | 84 | 1996 |
