Current-based data-retention-time characterization of gain-cell embedded DRAMs across the design and variations space R Giterman, A Bonetti, EV Bravo, T Noy, A Teman, A Burg IEEE Transactions on Circuits and Systems I: Regular Papers 67 (4), 1207-1217, 2020 | 11 | 2020 |
Efficient Implementation of Many-Ported Memories by Using Standard-Cell Memory Approach H Marinberg, E Garzón, T Noy, M Lanuzza, A Teman IEEE Access, 2023 | 4 | 2023 |
Design of a refresh-controller for GC-eDRAM based FIFOs T Noy, A Teman IEEE Transactions on Circuits and Systems I: Regular Papers 67 (12), 4804-4817, 2020 | 4 | 2020 |
A RISC-V-based research platform for rapid design cycle E Garzón, R Golman, O Harel, T Noy, Y Kra, A Pollock, S Yuzhaninov, ... 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2614-2615, 2022 | 3 | 2022 |
WP 2.0: Signoff-Quality Implementation and Validation of Energy-Efficient Clock-Less Wave Propagated Pipelining Y Kra, T Noy, A Teman 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 2 | 2021 |
Skew-balancing algorithm for digital circuitry A Teman, Y Kra, T Noy US Patent 11,556,145, 2023 | 1 | 2023 |
Wavepro: clock-less wave-propagated pipeline compiler for low-power and high-throughput computation Y Kra, T Noy, A Teman 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 1 | 2020 |
Refresh controller for first-in first-out memories A Teman, T Noy US Patent 10,803,920, 2020 | | 2020 |
Gain-Cell Embedded DRAM Based FIFOs T Noy Faculty of Engineering, Bar-Ilan University Ramat-Gan, Israel 2019, 0 | | |