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Bhagwan Ram Raad
Bhagwan Ram Raad
PDPM Indian Institute of Information Technology, Design and Manufacturing Jabalpur
在 iiitdmj.ac.in 的电子邮件经过验证
标题
引用次数
引用次数
年份
A new design approach of dopingless tunnel FET for enhancement of device characteristics
BR Raad, S Tirkey, D Sharma, P Kondekar
IEEE Transactions on Electron Devices 64 (4), 1830-1836, 2017
1262017
Drain work function engineered doping-less charge plasma TFET for ambipolar suppression and RF performance improvement: a proposal, design, and investigation
BR Raad, D Sharma, P Kondekar, K Nigam, DS Yadav
IEEE Transactions on Electron Devices 63 (10), 3950-3957, 2016
1092016
Performance investigation of bandgap, gate material work function and gate dielectric engineered TFET with device reliability improvement
BR Raad, K Nigam, D Sharma, PN Kondekar
Superlattices and Microstructures 94, 138-146, 2016
922016
Dielectric and work function engineered TFET for ambipolar suppression and RF performance enhancement
B Raad, K Nigam, D Sharma, P Kondekar
Electronics Letters 52 (9), 770-772, 2016
872016
Impactful study of dual work function, underlap and hetero gate dielectric on TFET with different drain doping profile for high frequency performance estimation and optimization
DS Yadav, D Sharma, BR Raad, V Bajaj
Superlattices and Microstructures 96, 36-46, 2016
522016
A novel approach to improve the performance of charge plasma tunnel field-effect transistor
S Tirkey, D Sharma, BR Raad, DS Yadav
IEEE Transactions on electron devices 65 (1), 282-289, 2017
322017
A new approach for design and investigation of junction-less tunnel FET using electrically doped mechanism
K Nigam, P Kondekar, D Sharma, BR Raad
Superlattices and Microstructures 98, 1-7, 2016
292016
A novel gate and drain engineered charge plasma tunnel field-effect transistor for low sub-threshold swing and ambipolar nature
DS Yadav, BR Raad, D Sharma
Superlattices and Microstructures 100, 266-273, 2016
252016
Dual workfunction hetero gate dielectric tunnel field-effect transistor performance analysis
DS Yadav, D Sharma, BR Raad, V Bajaj
2016 International Conference on Advanced Communication Control and …, 2016
252016
Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance
DS Yadav, A Verma, D Sharma, S Tirkey, BR Raad
Superlattices and Microstructures 111, 123-133, 2017
212017
Physics‐based simulation study of high‐performance gallium arsenide phosphide–indium gallium arsenide tunnel field‐effect transistor
BR Raad, D Sharma, K Nigam, P Kondekar
Micro & Nano Letters 11 (7), 366-368, 2016
202016
Performance investigation of hetero material (InAs/Si)‐based charge plasma TFET
DS Yadav, D Sharma, A Kumar, D Rathor, R Agrawal, S Tirkey, BR Raad, ...
Micro & Nano Letters 12 (6), 358-363, 2017
172017
Temperature based performance analysis of doping-less tunnel field effect transistor
DS Yadav, D Sharma, R Agrawal, G Prajapati, S Tirkey, BR Raad, V Bajaj
2017 International Conference on Information, Communication, Instrumentation …, 2017
162017
Introduction of a metal strip in oxide region of junctionless tunnel field-effect transistor to improve DC and RF performance
S Tirkey, D Sharma, BR Raad, DS Yadav
Journal of Computational Electronics 16 (3), 714-720, 2017
152017
DC and analog/RF performance optimisation of source pocket dual work function TFET
BR Raad, D Sharma, P Kondekar, K Nigam, S Baronia
International Journal of Electronics 104 (12), 1992-2006, 2017
142017
Group III–V ternary compound semiconductor materials for unipolar conduction in tunnel field-effect transistors
BR Raad, D Sharma, K Nigam, P Kondekar
Journal of Computational Electronics 16, 24-29, 2017
132017
Junction‐less charge plasma TFET with dual drain work functionality for suppressing ambipolar nature and improving radio‐frequency performance
S Tirkey, BR Raad, A Gedam, D Sharma
Micro & Nano Letters 13 (1), 18-23, 2018
122018
Source engineered tunnel FET for enhanced device electrostatics with trap charges reliability
BR Raad, D Sharma, S Tirkey
Microelectronic Engineering 194, 79-84, 2018
102018
Effective design technique for improvement of electrostatics behaviour of dopingless TFET: proposal, investigation and optimisation
M Aslam, D Sharma, D Soni, S Yadav, BR Raad, DS Yadav, N Sharma
Micro & Nano Letters 13 (10), 1480-1485, 2018
92018
Dual workfunction tunnel field-effect transistor with shifted gate for ambipolar suppression and ON current improvement
BR Raad, D Sharma, P Kondekar
2016 International Conference on Computational Techniques in Information and …, 2016
42016
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