Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits SA Ebrahimi, MR Reshadinezhad, A Bohlooli, M Shahsavari Microelectronics Journal 53, 156-166, 2016 | 83 | 2016 |
An Energy-Efficient Full Adder Cell Using CNFET Technology MR Reshadinezhad, MH Moaiyeri, K Navi IEICE Transactions on Electronics 95 (4), 744-751, 2012 | 58 | 2012 |
A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells A DABAGHI ZARANDI, MR RESHADINEZHAD, A RUBIO IEEE ACCESS 8 (1), 58585-58593, 2020 | 53 | 2020 |
LAHAF: Low-power, area-efficient, and high-performance approximate full adder based on static CMOS SE Fatemieh, SS Farahani, MR Reshadinezhad Sustainable Computing: Informatics and Systems 30, 100529, 2021 | 33 | 2021 |
Newly multiplexer-based quaternary half-adder and multiplier using CNTFETs ZD Shalamzari, AD Zarandi, MR Reshadinezhad AEU-International Journal of Electronics and Communications 117, 153128, 2020 | 31 | 2020 |
Design of a high performance CNTFET-based full adder cell applicable in: Carry ripple, carry select and carry skip adders HT Tari, AD Zarandi, MR Reshadinezhad Microelectronic Engineering 215, 110980, 2019 | 31 | 2019 |
A new twelve-transistor approximate 4: 2 compressor in CNTFET technology S Shirinabadi Farahani, MR Reshadinezhad International Journal of Electronics 106 (5), 691-706, 2019 | 27 | 2019 |
Fast and compact serial imply-based approximate full adders applied in image processing SE Fatemieh, MR Reshadinezhad, N TaheriNejad IEEE Journal on Emerging and Selected Topics in Circuits and Systems 13 (1 …, 2023 | 20 | 2023 |
A Novel 4×4 Universal Reversible Gate as a Cost Efficient Full Adder/Subtractor in Terms of Reversible and Quantum Metrics S Moghimi, R Reshadinezhad, Mohammad International Journal of Modern Education and Computer Science (IJMECS) 7 …, 2015 | 17 | 2015 |
Approximate in-memory computing using memristive imply logic and its application to image processing SE Fatemieh, MR Reshadinezhad, N TaheriNejad 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 3115-3119, 2022 | 12 | 2022 |
Design and implementation of a three-operand multiplier through carbon nanotube technology MR Reshadinezhad, N Charmchi, K Navi International Journal of Modern Education and Computer Science 7 (9), 44-51, 2015 | 12 | 2015 |
A new design method for imperfection-immune CNFET-based circuit design SA Ebrahimi, MR Reshadinezhad, A Bohlooli Microelectronics Journal 85, 62-71, 2019 | 11 | 2019 |
Power-efficient, high-PSNR approximate full adder applied in error-resilient computations based on CNTFETs SE Fatemieh, MR Reshadinezhad 2020 20th International Symposium on Computer Architecture and Digital …, 2020 | 10 | 2020 |
Energy Efficient Design of Four-operand Multiplier Architecture using CNTFET Technology N Charmchi, MR Reshadinezhad JOURNAL OF NANO- AND ELECTRONIC PHYSICS 10 (2), 1-8, 2018 | 10 | 2018 |
A Comparison Between Two Software Engineering Processes, RUP And Waterfall Model M zaminkara, R Mohammad, R. International Journal of Engineering Research & Technology (IJERT) 2 (7 …, 2013 | 10 | 2013 |
High-speed multiplier design using multi-operand multipliers MR Reshadinezhad, K Navi International Journal of Computer Science and Network 1 (2), 1-6, 2012 | 10* | 2012 |
Exploring and exploiting quantum-dot cellular automata SA Ebrahimi, MR Reshadinezhad International Journal of Nanoscience and Nanotechnology 11 (4), 225-232, 2015 | 7 | 2015 |
A Novel Low Complexity Combinational RNS Multiplier Using Parallel Prefix Adder R Mohammad, R., KS Farshad IJCSI International Journal of Computer Science Issues 10 (3), 430-440, 2013 | 7* | 2013 |
Design of an Efficient Current Mode Full-Adder Applying Carbon Nanotube Technology N Parisa, R Mohammad, Reza International Journal of Modern Education and Computer Science 10 (4), 43-50, 2018 | 5 | 2018 |
A new high speed 2 n–1 modular adder based on carbon nano tube field effect transistors M Ahmadi, MR Reshadinezhad Journal of Nanoelectronics and Optoelectronics 13 (4), 602-609, 2018 | 4 | 2018 |