| Fassem: Fpga based acceleration of de novo genome assembly BSC Varma, K Paul, M Balakrishnan, D Lavenier 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013 | 32 | 2013 |
| Low-Latency In Situ Image Analytics With FPGA-Based Quantized Convolutional Neural Network M Wang, KCM Lee, BMF Chung, SV Bogaraju, HC Ng, JSJ Wong, ... IEEE Transactions on Neural Networks and Learning Systems 33 (7), 2853-2866, 2021 | 16 | 2021 |
| Accelerating 3D-FFT using hard embedded blocks in FPGAs BSC Varma, K Paul, M Balakrishnan 2013 26th International Conference on VLSI Design and 2013 12th …, 2013 | 16 | 2013 |
| All-passive pixel super-resolution of time-stretch imaging ACS Chan, HC Ng, SCV Bogaraju, HKH So, EY Lam, KK Tsia Scientific reports 7 (1), 44608, 2017 | 15 | 2017 |
| A quantitative study of locality in GPU caches for memory-divergent workloads S Lal, BS Varma, B Juurlink International journal of parallel programming 50 (2), 189-216, 2022 | 12 | 2022 |
| Configurable architectures for multi-mode floating point adders MK Jaiswal, BSC Varma, HKH So, M Balakrishnan, K Paul, RCC Cheung IEEE Transactions on Circuits and Systems I: Regular Papers 62 (8), 2079-2090, 2015 | 12 | 2015 |
| Architecture exploration of FPGA based accelerators for BioInformatics applications BSC Varma, K Paul, M Balakrishnan Springer, 2016 | 10 | 2016 |
| Accelerating genome assembly using hard embedded blocks in FPGAs BSC Varma, K Paul, M Balakrishnan 2014 27th International Conference on VLSI Design and 2014 13th …, 2014 | 9 | 2014 |
| High-throughput microparticle screening by 1-μm time-stretch optofluidic imaging integrated with a field-programmable gate array platform BMF Chung, HC Ng, M Wang, SCV Bogaraju, AHC Shum, HKH So, ... CLEO: Science and Innovations, STh3G. 4, 2016 | 4 | 2016 |
| Fpga-based acceleration of de novo genome assembly BSC Varma, K Paul, M Balakrishnan, BSC Varma, K Paul, M Balakrishnan Architecture Exploration of FPGA Based Accelerators for BioInformatics …, 2016 | 3 | 2016 |
| Hardware acceleration of de novo genome assembly BSC Varma, K Paul, B M, D Lavenier International Journal of Embedded Systems (Special Issue on: "Reconfigurable …, 2015 | 3 | 2015 |
| Architecture for dual-mode quadruple precision floating point adder MK Jaiswal, BSC Varma, HKH So IEEE Computer Society Annual Symposium on VLSI, 2015 | 3 | 2015 |
| High level design approach to accelerate de novo genome assembly using FPGAs BSC Varma, K Paul, M Balakrishnan 2014 17th Euromicro Conference on Digital System Design, 66-73, 2014 | 3 | 2014 |
| Real-time object detection and classification for high-speed asymmetric-detection time-stretch optical microscopy on FPGA M Wang, HC Ng, BMF Chung, BSC Varma, MK Jaiswal, KK Tsia, ... 2016 International Conference on Field-Programmable Technology (FPT), 261-264, 2016 | 2 | 2016 |
| High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform HC Ng, M Wang, BMF Chung, BSC Varma, MK Jaiswal, SMH Ho, KK Tsia, ... 2016 International Conference on ReConFigurable Computing and FPGAs …, 2016 | 2 | 2016 |
| FPGA-based acceleration of protein docking BSC Varma, K Paul, M Balakrishnan, BSC Varma, K Paul, M Balakrishnan Architecture Exploration of FPGA Based Accelerators for BioInformatics …, 2016 | 1 | 2016 |
| Embedded DNN Classifier for Five Different Cardiac Diseases MS Akram, BS Varma, D Finlay 2024 35th Irish Signals and Systems Conference (ISSC), 01-06, 2024 | | 2024 |
| The VINEYARD integrated framework for hardware accelerators in the cloud C Kachris, D Soudris, S Mavridis, M Pavlidakis, C Symeonidou, ... Proceedings of the 18th International Conference on Embedded Computer …, 2018 | | 2018 |
| Architecture Exploration of Fpga Based Accelerators for Bioinformatics Applications BS CHANDRA, P VARMA SPRINGER Verlag, SINGAPOR, 2018 | | 2018 |
| Methodology for Implementing Accelerators BSC Varma, K Paul, M Balakrishnan, BSC Varma, K Paul, M Balakrishnan Architecture Exploration of FPGA Based Accelerators for BioInformatics …, 2016 | | 2016 |
Kolin PaulIIT Delhi在 cse.iitd.ac.in 的电子邮件经过验证
