Area and power-efficient capacitively-coupled chopper instrumentation amplifiers in 28 nm CMOS for multi-channel biosensing applications XT Pham, NT Nguyen, VN Nguyen, JW Lee IEEE Access 9, 86773-86785, 2021 | 20 | 2021 |
A cyclic vernier two-step TDC for high input range time-of-flight sensor using startup time correction technique VN Nguyen, DN Duong, Y Chung, JW Lee Sensors 18 (11), 3948, 2018 | 19 | 2018 |
A 0.52 μW, 38 nV/√Hz Chopper Amplifier With a Low-Noise DC Servo Loop, an Embedded Ripple Reduction Loop, and a Squeezed Inverter Stage XT Pham, VN Nguyen, JS Kim, JW Lee IEEE Transactions on Circuits and Systems II: Express Briefs 68 (6), 1793-1797, 2020 | 16 | 2020 |
A 250-μW, 18-nV/rtHz current-feedback chopper instrumentation amplifier in 180-nm cmos for high-performance bio-potential sensing applications HS Lee, VN Nguyen, XL Pham, JW Lee, HK Park Analog Integrated Circuits and Signal Processing 90, 137-148, 2017 | 13 | 2017 |
An 8.5 ps resolution, cyclic Vernier TDC using a stage-gated ring oscillator and DWA-based dynamic element matching in 28 nm CMOS VN Nguyen, XT Pham, JW Lee IEEE Transactions on Instrumentation and Measurement 71, 1-12, 2022 | 9 | 2022 |
Three-step cyclic Vernier TDC using a pulse-shrinking inverter-assisted residue quantizer for low-complexity resolution enhancement VN Nguyen, XT Pham, JW Lee IEEE Transactions on Instrumentation and Measurement 70, 1-12, 2021 | 9 | 2021 |
A power efficient secure mutual authentication protocol for EPC Gen2v2 standard NX Hieu, N Van Nhan, D Park, D Chung, H Lee, JW Lee 2015 International SoC Design Conference (ISOCC), 325-326, 2015 | 3 | 2015 |
A 4.7-ps resolution recirculating cyclic Vernier TDC using DWA-based mismatch correction and a register-based time amplifier VN Nguyen, JW Lee IEEE Transactions on Instrumentation and Measurement 72, 1-13, 2023 | 2 | 2023 |
A Two-Step, Cyclic Vernier-Based Time-to-Digital Converter Using Dynamic Element Matching VN Nguyen, JW Lee 한국통신학회 학술대회논문집, 272-273, 2021 | | 2021 |