受强制性开放获取政策约束的文章 - Amit Agarwal了解详情
无法在其他位置公开访问的文章：38 篇
Analysis and compact modeling of negative capacitance transistor with high ON-current and negative output differential resistance—Part II: Model validation
G Pahwa, T Dutta, A Agarwal, S Khandelwal, S Salahuddin, C Hu, ...
IEEE Transactions on Electron Devices 63 (12), 4986-4992, 2016
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Numerical investigation of short-channel effects in negative capacitance MFIS and MFMIS transistors: Subthreshold behavior
G Pahwa, A Agarwal, YS Chauhan
IEEE Transactions on Electron Devices 65 (11), 5130-5136, 2018
强制性开放获取政策： Department of Science & Technology, India
Physical insights on negative capacitance transistors in nonhysteresis and hysteresis regimes: MFMIS versus MFIS structures
G Pahwa, T Dutta, A Agarwal, YS Chauhan
IEEE Transactions on Electron Devices 65 (3), 867-873, 2018
强制性开放获取政策： Department of Science & Technology, India
Doping Strategies for Monolayer MoS2 via Surface Adsorption: A Systematic Study
P Rastogi, S Kumar, S Bhowmick, A Agarwal, YS Chauhan
J. Phys. Chem. C 118 (51), 30309–30314, 2014
强制性开放获取政策： Department of Science & Technology, India
Compact model for ferroelectric negative capacitance transistor with MFIS structure
G Pahwa, T Dutta, A Agarwal, YS Chauhan
IEEE Transactions on Electron Devices 64 (3), 1366-1374, 2017
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Performance evaluation of 7-nm node negative capacitance FinFET-based SRAM
T Dutta, G Pahwa, AR Trivedi, S Sinha, A Agarwal, YS Chauhan
IEEE Electron Device Letters 38 (8), 1161-1164, 2017
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Compact modeling of transition metal dichalcogenide based thin body transistors and circuit validation
C Yadav, A Agarwal, YS Chauhan
IEEE transactions on electron devices 64 (3), 1261-1268, 2017
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Impact of process variations on negative capacitance FinFET devices and circuits
T Dutta, G Pahwa, A Agarwal, YS Chauhan
IEEE Electron Device Letters 39 (1), 147-150, 2017
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Numerical investigation of short-channel effects in negative capacitance MFIS and MFMIS transistors: Above-threshold behavior
G Pahwa, A Agarwal, YS Chauhan
IEEE Transactions on Electron Devices 66 (3), 1591-1598, 2019
强制性开放获取政策： Department of Science & Technology, India
Thickness and stacking dependent polarizability and dielectric constant of graphene–hexagonal boron nitride composite stacks
P Kumar, YS Chauhan, A Agarwal, S Bhowmick
The Journal of Physical Chemistry C 120 (31), 17620-17626, 2016
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Quantum confinement effects in extremely thin body germanium n-MOSFETs
P Rastogi, T Dutta, S Kumar, A Agarwal, YS Chauhan
IEEE Transactions on Electron Devices 62 (11), 3575-3580, 2015
强制性开放获取政策： Department of Science & Technology, India
Unified compact model for nanowire transistors including quantum effects and quasi-ballistic transport
A Dasgupta, A Agarwal, YS Chauhan
IEEE Transactions on Electron Devices 64 (4), 1837-1845, 2017
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Capacitance modeling in III–V FinFETs
C Yadav, JP Duarte, S Khandelwal, A Agarwal, C Hu, YS Chauhan
IEEE Transactions on Electron Devices 62 (11), 3892-3897, 2015
强制性开放获取政策： Department of Science & Technology, India
Compact modeling of surface potential, charge, and current in nanoscale transistors under quasi-ballistic regime
A Dasgupta, A Agarwal, S Khandelwal, YS Chauhan
IEEE Transactions on Electron Devices 63 (11), 4151-4159, 2016
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Compact modeling of cross-sectional scaling in gate-all-around FETs: 3-D to 1-D transition
A Dasgupta, P Rastogi, A Agarwal, C Hu, YS Chauhan
IEEE Transactions on Electron Devices 65 (3), 1094-1100, 2018
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Fermiology and type-I superconductivity in the chiral superconductor with Kramers-Weyl fermions
E Emmanouilidou, S Mardanya, J Xing, PVS Reddy, A Agarwal, ...
Physical Review B 102 (23), 235144, 2020
强制性开放获取政策： US National Science Foundation
Compact modeling of charge, capacitance, and drain current in III–V channel double gate FETs
C Yadav, M Agrawal, A Agarwal, YS Chauhan
IEEE Transactions on Nanotechnology 16 (2), 347-354, 2017
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Designing Power-Efficient Transistors Using Narrow-Bandwidth Materials from the (; ; ) Monolayer Series
K Nandan, S Bhowmick, YS Chauhan, A Agarwal
Physical Review Applied 19 (6), 064058, 2023
强制性开放获取政策： Department of Science & Technology, India
Band-to-band tunneling in Γ valley for Ge source lateral tunnel field effect transistor: thickness scaling
P Jain, P Rastogi, C Yadav, A Agarwal, YS Chauhan
Journal of Applied Physics 122 (1), 2017
强制性开放获取政策： Council of Scientific and Industrial Research, India, Department of Science …
Di-metal chalcogenides: A new family of promising 2-D semiconductors for high-performance transistors
A Naseer, K Nandan, A Agarwal, S Bhowmick, YS Chauhan
IEEE Transactions on Electron Devices 70 (5), 2445-2452, 2023
强制性开放获取政策： Department of Science & Technology, India
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