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Feng-Wei Kuo
Feng-Wei Kuo
在 tsmc.com 的电子邮件经过验证
标题
引用次数
引用次数
年份
High-performance integrated fan-out wafer level packaging (InFO-WLP): Technology and system integration
CC Liu, SM Chen, FW Kuo, HN Chen, EH Yeh, CC Hsieh, LH Huang, ...
2012 International Electron Devices Meeting, 14.1. 1-14.1. 4, 2012
1352012
A Bluetooth low-energy transceiver with 3.7-mW all-digital transmitter, 2.75-mW high-IF discrete-time receiver, and TX/RX switchable on-chip matching network
FW Kuo, SB Ferreira, HNR Chen, LC Cho, CP Jou, FL Hsueh, I Madadi, ...
IEEE Journal of Solid-State Circuits 52 (4), 1144-1162, 2017
1342017
A fully integrated Bluetooth low-energy transmitter in 28 nm CMOS with 36% system efficiency at 3 dBm
M Babaie, FW Kuo, HNR Chen, LC Cho, CP Jou, FL Hsueh, ...
IEEE Journal of Solid-State Circuits 51 (7), 1547-1565, 2016
1032016
Antenna cavity structure for integrated patch antenna in integrated fan-out packaging
WS Liao, CP Jou, FW Kuo
US Patent 9,711,465, 2017
862017
3D transmission lines for semiconductors
YL Lin, HT Yen, FW Kuo, HH Chen, CW Kuo
US Patent 8,912,581, 2014
702014
Phase-locked loops that share a loop filter
FW Kuo, SA Chi, C Huan-Neng, YJ Chen, CP Jou
US Patent 8,547,151, 2013
612013
Bead for 2.5 D/3D chip packaging application
FW Kuo, C Huan-Neng, CP Jou, DC Yeh, CT Wang
US Patent 9,275,950, 2016
472016
A 12mW all-digital PLL based on class-F DCO for 4G phones in 28nm CMOS
FW Kuo, R Chen, K Yen, HY Liao, CP Jou, FL Hsueh, M Babaie, ...
2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014
442014
A 0.5-V 1.6-mW 2.4-GHz fractional-N all-digital PLL for Bluetooth LE with PVT-insensitive TDC using switched-capacitor doubler in 28-nm CMOS
N Pourmousavian, FW Kuo, T Siriburanon, M Babaie, RB Staszewski
IEEE Journal of Solid-State Circuits 53 (9), 2572-2583, 2018
432018
Three-dimensional integrated circuit and method for wireless information access thereof
MJ Wang, CP Jou, CN Peng, C Huan-Neng, HC Lin, KK Yen, H Chen, ...
US Patent 9,086,452, 2015
392015
Semiconductor package device with integrated antenna and manufacturing method thereof
WS Liao, FW Kuo, CH Tung, CH Yu
US Patent 10,460,987, 2019
362019
A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75 mW high-IF discrete-time receiver, and 3.6 mW all-digital transmitter
FW Kuo, SB Ferreira, M Babaie, R Chen, L Cho, CP Jou, FL Hsueh, ...
2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016
312016
PVT-free calibration circuit for TDC resolution in ADPLL
FW Kuo, KK Yen, C Huan-Neng, L Hsien-Yuan, CP Jou, RB Staszewski
US Patent 8,570,082, 2013
302013
Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC)
KK Yen, FW Kuo, C Huan-Neng, L Hsien-Yuan, RB Staszewski
US Patent 8,593,189, 2013
272013
Auto frequency calibration for a phase locked loop and method of use
YJ Chen, FW Kuo, C Huan-Neng, CP Jou
US Patent 8,953,730, 2015
252015
System design of a 2.75-mW discrete-time superheterodyne receiver for Bluetooth low energy
SB Ferreira, FW Kuo, M Babaie, S Bampi, RB Staszewski
IEEE Transactions on Microwave Theory and Techniques 65 (5), 1904-1913, 2017
242017
Interposer and semiconductor package with noise suppression features
FW Kuo, HY Lee, C Huan-Neng, YJ Chen, YL Lin, CP Jou
US Patent App. 13/360,958, 2013
242013
An all-digital PLL for cellular mobile phones in 28-nm CMOS with− 55 dBc fractional and− 91 dBc reference spurs
FW Kuo, M Babaie, HNR Chen, LC Cho, CP Jou, M Chen, RB Staszewski
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (11), 3756-3768, 2018
212018
A 0.5 V 1.6 mW 2.4 GHz fractional-N all-digital PLL for Bluetooth LE with PVT-insensitive TDC using switched-capacitor doubler in 28nm CMOS
FW Kuo, S Pourmousavian, T Siriburanon, R Chen, L Cho, CP Jou, ...
2017 Symposium on VLSI Circuits, C178-C179, 2017
192017
Lock detector and method of detecting lock status for phase lock loop
FW Kuo, YEN Kyle, C Huan-Neng, YJ Chen, CP Jou
US Patent 8,456,207, 2013
182013
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