J. berg, K S Kumar, A Jantsch, J Soininen, M Forsell, M Millberg Tiensyrj, and A. Hemani," A Network on Chip Architecture and Design …, 2002 | 1840* | 2002 |
Networks on chip A Jantsch, H Tenhunen Kluwer Academic Publishers, 2003 | 1073 | 2003 |
Network on chip: An architecture for billion transistor era A Hemani, A Jantsch, S Kumar, A Postula, J Oberg, M Millberg, ... Proceeding of the IEEE NorChip Conference, 166-173, 2000 | 653 | 2000 |
Network on chip: An architecture for billion transistor era SKAPJ Oberg, MMA Hemani, A Jantsch, D Lindqvist Proc. 18th IEEE Norchip Coference, 2000 | 653* | 2000 |
Guaranteed bandwidth using looped containers in temporally disjoint networks within the Nostrum network on chip M Millberg, E Nilsson, R Thid, A Jantsch Design, Automation and Test in Europe Conference and Exhibition, 2004 …, 2004 | 525 | 2004 |
Modeling embedded systems and SoCs: concurrency and time in models of computation A Jantsch Morgan Kaufmann Pub, 2004 | 360 | 2004 |
The Nostrum backbone-a communication protocol stack for networks on chip M Millberg, E Nilsson, R Thid, S Kumar, A Jantsch 17th International Conference on VLSI Design. Proceedings., 693-696, 2004 | 312 | 2004 |
Methods for fault tolerance in networks-on-chip M Radetzki, C Feng, X Zhao, A Jantsch ACM Computing Surveys (CSUR) 46 (1), 1-38, 2013 | 278 | 2013 |
System modeling and transformational design refinement in ForSyDe [formal system design] I Sander, A Jantsch IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004 | 257 | 2004 |
Load distribution with the proximity congestion awareness in a network on chip E Nilsson, M Millberg, J Oberg, A Jantsch 2003 Design, Automation and Test in Europe Conference and Exhibition, 1126-1127, 2003 | 237 | 2003 |
Run-time partial reconfiguration speed investigation and architectural design space exploration M Liu, W Kuehn, Z Lu, A Jantsch 2009 International Conference on Field Programmable Logic and Applications …, 2009 | 219 | 2009 |
The benefits of self-awareness and attention in fog and mist computing JS Preden, K Tammemäe, A Jantsch, M Leier, A Riid, E Calis Computer 48 (7), 37-45, 2015 | 207 | 2015 |
Cluster-based simulated annealing for mapping cores onto 2D mesh networks on chip Z Lu, L Xia, A Jantsch Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008 …, 2008 | 195 | 2008 |
A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip H Zimmer, A Jantsch Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003 | 160 | 2003 |
Fog computing in the internet of things: Intelligence at the edge AM Rahmani, P Liljeberg, JS Preden, A Jantsch Springer, 2017 | 154 | 2017 |
Models of computation and languages for embedded system design A Jantsch, I Sander IEE Proceedings-Computers and Digital Techniques 152 (2), 114-129, 2005 | 152 | 2005 |
Interconnect-centric design for advanced SoC and NoC J Nurmi, J Isoaho, A Jantsch, H Tenhunen Kluwer Academic Publishers, 2004 | 144 | 2004 |
Hardware/software partitioning and minimizing memory interface traffic A Jantsch, P Ellervee, A Hemani, J Öberg, H Tenhunen European Design Automation Conference: Proceedings of the conference on …, 1994 | 142 | 1994 |
An analytical latency model for networks-on-chip AE Kiasari, Z Lu, A Jantsch IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (1), 113-123, 2012 | 140 | 2012 |
Addressing transient and permanent faults in NoC with efficient fault-tolerant deflection router C Feng, Z Lu, A Jantsch, M Zhang, Z Xing IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (6 …, 2012 | 130 | 2012 |