A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... ACM SIGARCH Computer Architecture News 42 (3), 13-24, 2014 | 1531 | 2014 |
A cloud-scale acceleration architecture AM Caulfield, ES Chung, A Putnam, H Angepat, J Fowers, M Haselman, ... 2016 49th Annual IEEE/ACM international symposium on microarchitecture …, 2016 | 848 | 2016 |
Azure accelerated networking:{SmartNICs} in the public cloud D Firestone, A Putnam, S Mundkur, D Chiou, A Dabagh, M Andrewartha, ... 15th USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2018 | 678 | 2018 |
Serving dnns in real time at datacenter scale with project brainwave E Chung, J Fowers, K Ovtcharov, M Papamichael, A Caulfield, ... iEEE Micro 38 (2), 8-20, 2018 | 377 | 2018 |
GPGPU performance and power estimation using machine learning G Wu, JL Greathouse, A Lyashevsky, N Jayasena, D Chiou 2015 IEEE 21st international symposium on high performance computer …, 2015 | 256 | 2015 |
Fpga-accelerated simulation technologies (fast): Fast, full-system, cycle-accurate simulators D Chiou, D Sunwoo, J Kim, NA Patil, W Reinhart, DE Johnson, J Keefe, ... 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2007 | 254 | 2007 |
RAMP: Research accelerator for multiple processors J Wawrzynek, D Patterson, M Oskin, SL Lu, C Kozyrakis, JC Hoe, D Chiou, ... IEEE micro 27 (2), 46-57, 2007 | 229 | 2007 |
A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... IEEE Micro 35 (3), 10-22, 2015 | 169 | 2015 |
Application-specific memory management for embedded systems using software-controlled caches D Chiou, P Jain, L Rudolph, S Devadas Proceedings of the 37th Annual Design Automation Conference, 416-419, 2000 | 168 | 2000 |
Dynamic Cache Partitioning via Columnization D Chiou, S Devadas, L Rudolph, BS Ang | 127* | 1999 |
Deep neural network processing on hardware accelerators with stacked memory DC Burger, D Chiou, E Chung, AR Putnam US Patent 10,540,588, 2020 | 126 | 2020 |
Method and apparatus for curious and column caching D Chiou, BS Ang US Patent 6,370,622, 2002 | 121 | 2002 |
An fpga-based in-line accelerator for memcached M Lavasani, H Angepat, D Chiou IEEE Computer architecture letters 13 (2), 57-60, 2013 | 117 | 2013 |
A framework for packet selection and reporting N Duffield, D Chiou, B Claise, A Greenberg, Grossglauser, M, J Rexford | 113 | 2009 |
Performance studies of the Monsoon dataflow processor J Hicks, D Chiou, BS Ang, Arvind Journal of Parallel and Distributed Computing 18 (3), 273-300, 1993 | 103* | 1993 |
START-NG: Delivering Seamless Parallel Computing D Chiou, BS Ang, R Greiner, Arvind, JC Hoe, MJ Beckerle, JE Hicks, ... Proceedings of EURO-PAR’95, 101-116, 1995 | 101 | 1995 |
StarT-Voyager: A flexible platform for exploring scalable SMP issues BS Ang, D Chiou, DL Rosenband, M Ehrlich, L Rudolph SC'98: Proceedings of the 1998 ACM/IEEE Conference on Supercomputing, 26-26, 1998 | 80* | 1998 |
Adaptive source routing and packet processing D Chiou, L Dennison, W Dally US Patent App. 10/815,458, 2005 | 79 | 2005 |
The FAST methodology for high-speed SoC/computer simulation D Chiou, D Sunwoo, J Kim, N Patil, WH Reinhart, DE Johnson, Z Xu 2007 IEEE/ACM International Conference on Computer-Aided Design, 295-302, 2007 | 61 | 2007 |
Extending the reach of microprocessors: Column and curious caching D Chiou Massachusetts Institute of Technology, 1999 | 60 | 1999 |