| Xilinx Adaptive Compute Acceleration Platform: VersalTM Architecture B Gaide, D Gaitonde, C Ravishankar, T Bauer Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019 | 175 | 2019 |
| Placement strategies for 2.5 D FPGA fabric architectures C Ravishankar, D Gaitonde, T Bauer 2018 28th International Conference on Field Programmable Logic and …, 2018 | 22 | 2018 |
| Raising FPGA logic density through synthesis-inspired architecture JH Anderson, Q Wang, C Ravishankar IEEE transactions on very large scale integration (VLSI) systems 20 (3), 537-550, 2011 | 15 | 2011 |
| FPGA power reduction by guarded evaluation JH Anderson, C Ravishankar Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010 | 14 | 2010 |
| FPGA power reduction by guarded evaluation considering logic architecture C Ravishankar, JH Anderson, A Kennings IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 13 | 2012 |
| Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms C Ravishankar, S Ananthanarayanan, S Garg, A Kennings Thirteenth International Symposium on Quality Electronic Design (ISQED), 617-624, 2012 | 11 | 2012 |
| Modular and lean architecture with elasticity for sparse matrix vector multiplication on fpgas AK Jain, C Ravishankar, H Omidian, S Kumar, M Kulkarni, A Tripathi, ... 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom …, 2023 | 9 | 2023 |
| EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip C Ravishankar, S Ananthanarayan, S Garg, A Kennings 22nd International Conference on Field Programmable Logic and Applications …, 2012 | 6 | 2012 |
| Sat based place-and-route for high-speed designs on 2.5 d fpgas C Ravishankar, H Fraisse, D Gaitonde 2018 International Conference on Field-Programmable Technology (FPT), 118-125, 2018 | 5 | 2018 |
| Parallel FPGA technology mapping using multi-core architectures A Kennings, C Ravishankar 2011 24th Canadian Conference on Electrical and Computer Engineering (CCECE …, 2011 | 4 | 2011 |
| IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck S Shrivastava, S Nikolić, C Ravishankar, D Gaitonde, M Stojilović 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 3 | 2023 |
| Method and system for making pin-to-pin signal connections C Ravishankar, D Moore US Patent 10,810,341, 2020 | 2 | 2020 |
| EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip S Ananthanarayanan, C Ravishankar, S Garg, A Kennings Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012 | 2 | 2012 |
| Mitigating the Last-Mile Bottleneck: A Two-Step Approach For Faster Commercial FPGA Routing S Shrivastava, S Nikolic, C Ravishankar, D Gaitonde, M Stojilovic Proceedings of the 2023 ACM/SIGDA International Symposium on Field …, 2023 | 1 | 2023 |
| Software defined device variants DD Gaitonde, MH Klein, H Verma, C Ravishankar, MR Kulkarni US Patent App. 18/128,947, 2024 | | 2024 |
| Runtime efficient multi-stage router flow for circuit designs DD Gaitonde, C Ravishankar, S Nikolic US Patent App. 18/066,231, 2024 | | 2024 |
| Time-division multiplexing (TDM) in integrated circuits for routability and runtime enhancement C Ravishankar, DD Gaitonde US Patent 11,888,693, 2024 | | 2024 |
| Resolving timing violations in multi-die circuit designs H Fraisse, DD Gaitonde, C Ravishankar US Patent 10,747,929, 2020 | | 2020 |
| Configurable logic block (CLB) internal routing architecture for enhanced local routing and clocking improvements EF Dellinger, JT Young, BC Gaide, C Ravishankar, D Moore, SP Young US Patent 10,715,149, 2020 | | 2020 |
| FPGA power reduction by guarded evaluation considering physical information C Ravishankar, A Kennings, J Anderson 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012 | | 2012 |
Jason AndersonProfessor of Electrical and Computer Engineering, University of Toronto在 eecg.toronto.edu 的电子邮件经过验证
Jason AndersonProfessor of Electrical and Computer Engineering, University of Toronto在 eecg.toronto.edu 的电子邮件经过验证
Siddharth GargNew York University在 nyu.edu 的电子邮件经过验证