关注
Xiaoheng Chen
Xiaoheng Chen
在 google.com 的电子邮件经过验证
标题
引用次数
引用次数
年份
Memory system optimization for FPGA-based implementation of quasi-cyclic LDPC codes decoders
X Chen, J Kang, S Lin, V Akella
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (1), 98-111, 2010
1152010
High-throughput efficient non-binary LDPC decoder based on the simplified min-sum algorithm
X Chen, CL Wang
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (11), 2784-2794, 2012
762012
A simplified min-sum decoding algorithm for non-binary LDPC codes
CL Wang, X Chen, Z Li, S Yang
IEEE Transactions on Communications 61 (1), 24-32, 2012
682012
QSN—A simple circular-shift network for reconfigurable quasi-cyclic LDPC decoders
X Chen, S Lin, V Akella
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (10), 782-786, 2010
682010
Efficient configurable decoder architecture for nonbinary quasi-cyclic LDPC codes
X Chen, S Lin, V Akella
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (1), 188-197, 2011
392011
Detection and handling of unbalanced errors in interleaved codewords
S Jeon, X Chen
US Patent 9,092,350, 2015
252015
Hardware implementation of a backtracking-based reconfigurable decoder for lowering the error floor of quasi-cyclic LDPC codes
X Chen, J Kang, S Lin, V Akella
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (12), 2931-2943, 2011
242011
Accelerating FPGA-based emulation of quasi-cyclic LDPC codes with vector processing
X Chen, J Kang, S Lin, V Akella
2009 Design, Automation & Test in Europe Conference & Exhibition, 1530-1535, 2009
242009
FPGA-based low-complexity high-throughput tri-mode decoder for quasi-cyclic LDPC codes
X Chen, Q Huang, S Lin, V Akella
2009 47th Annual Allerton Conference on Communication, Control, and …, 2009
232009
Method and system for determining soft information offsets
X Chen, J Kang, J Zhu, YY Tai
US Patent 9,647,697, 2017
182017
Read threshold adjustment with feedback information from error recovery
X Chen, W Wang, J Yuan, JL Whaley
US Patent 10,468,117, 2019
122019
Exploiting data-level parallelism for energy-efficient implementation of LDPC decoders and DCT on an FPGA
X Chen, V Akella
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4 (4), 1-17, 2011
112011
Method and apparatus for adaptive data retention management in non-volatile memory
J Yuan, JL Whaley, X Chen, W Wang
US Patent 10,839,886, 2020
92020
Dynamic multi-stage decoding
J Tao, C Niang-Chu, MJ Dancho, X Chen
US Patent 10,558,522, 2020
92020
Error recovery of cross-die logical pages in a solid state device
X Chen
US Patent 10,732,899, 2020
52020
Syndrome layered decoding for LDPC codes
X Chen, J Zhu, YY Tai
US Patent 9,136,877, 2015
52015
Adaptive LLR based on syndrome weight
S Jeon, Y Tai, J Zhu, X Chen
US Patent 9,009,576, 2015
52015
Compressing data from multiple reads for error control management in memory systems
X Chen, YY Tai, J Zhu, S Jeon
US Patent 9,239,751, 2016
42016
Universal and reconfigurable QC-LDPC encoder
J Zhu, YY Tai, X Chen
US Patent 9,236,886, 2016
42016
Two-dimensional scalable versatile storage format for data storage devices
R Brittner, X Chen, MJ Dancho
US Patent 10,990,304, 2021
32021
系统目前无法执行此操作,请稍后再试。
文章 1–20