| FPGA/DNN co-design: An efficient design methodology for IoT intelligence on the edge C Hao, X Zhang, Y Li, S Huang, J Xiong, K Rupnow, W Hwu, D Chen Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 214 | 2019 |
| Cloud-DNN: An open framework for mapping DNN models to cloud FPGAs Y Chen, J He, X Zhang, C Hao, D Chen Proceedings of the 2019 ACM/SIGDA international symposium on field …, 2019 | 136 | 2019 |
| AutoDNNchip: An automated DNN chip predictor and builder for both FPGAs and ASICs P Xu, X Zhang, C Hao, Y Zhao, Y Zhang, Y Wang, C Li, Z Guan, D Chen, ... Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020 | 116 | 2020 |
| SkyNet: a hardware-efficient method for object detection and tracking on embedded systems X Zhang, H Lu, C Hao, J Li, B Cheng, Y Li, K Rupnow, J Xiong, T Huang, ... Proceedings of Machine Learning and Systems 2, 216-229, 2020 | 112 | 2020 |
| Edd: Efficient differentiable dnn architecture and implementation co-search for embedded ai solutions Y Li, C Hao, X Zhang, X Liu, Y Chen, J Xiong, W Hwu, D Chen 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 106 | 2020 |
| Scalehls: A new scalable high-level synthesis framework on multi-level intermediate representation H Ye, C Hao, J Cheng, H Jeong, J Huang, S Neuendorffer, D Chen 2022 IEEE international symposium on high-performance computer architecture …, 2022 | 81 | 2022 |
| IRONMAN GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning N Wu, Y Xie, C Hao Proceedings of the 2021 on Great Lakes Symposium on VLSI, 39-44, 2021 | 65 | 2021 |
| Improving the generalization ability of deep neural networks for cross-domain visual recognition J Zheng, C Lu, C Hao, D Chen, D Guo IEEE Transactions on Cognitive and Developmental Systems 13 (3), 607-620, 2020 | 51 | 2020 |
| M³vit: Mixture-of-experts vision transformer for efficient multi-task learning with model-accelerator co-design Z Fan, R Sarkar, Z Jiang, T Chen, K Zou, Y Cheng, C Hao, Z Wang Advances in Neural Information Processing Systems 35, 28441-28457, 2022 | 50 | 2022 |
| VecQ: Minimal loss DNN model compression with vectorized weight quantization C Gong, Y Chen, Y Lu, T Li, C Hao, D Chen IEEE Transactions on Computers 70 (5), 696-710, 2020 | 48 | 2020 |
| Enabling design methodologies and future trends for edge AI: Specialization and codesign C Hao, J Dotzel, J Xiong, L Benini, Z Zhang, D Chen IEEE Design & Test 38 (4), 7-26, 2021 | 44 | 2021 |
| T-DLA: An open-source deep learning accelerator for ternarized DNN models on embedded FPGA Y Chen, K Zhang, C Gong, C Hao, X Zhang, T Li, D Chen 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 13-18, 2019 | 44 | 2019 |
| High-level synthesis performance prediction using gnns: Benchmarking, modeling, and advancing N Wu, H Yang, Y Xie, P Li, C Hao Proceedings of the 59th ACM/IEEE Design Automation Conference, 49-54, 2022 | 41 | 2022 |
| IronMan-Pro: Multiobjective design space exploration in HLS via reinforcement learning and graph neural network-based modeling N Wu, Y Xie, C Hao IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 39 | 2022 |
| FlowGNN: A dataflow architecture for real-time workload-agnostic graph neural network inference R Sarkar, S Abi-Karam, Y He, L Sathidevi, C Hao 2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023 | 37 | 2023 |
| Generic neural architecture search via regression Y Li, C Hao, P Li, J Xiong, D Chen Advances in Neural Information Processing Systems 34, 20476-20490, 2021 | 35 | 2021 |
| A hybrid GPU+ FPGA system design for autonomous driving cars C Hao, A Sarwari, Z Jin, H Abu-Haimed, D Sew, Y Li, X Liu, B Wu, D Fu, ... 2019 IEEE International Workshop on Signal Processing Systems (SiPS), 121-126, 2019 | 31 | 2019 |
| Unsupervised learning for combinatorial optimization with principled objective relaxation HP Wang, N Wu, H Yang, C Hao, P Li Advances in Neural Information Processing Systems 35, 31444-31458, 2022 | 29 | 2022 |
| WinoCNN: Kernel sharing Winograd systolic array for efficient convolutional neural network acceleration on FPGAs X Liu, Y Chen, C Hao, A Dhar, D Chen 2021 IEEE 32nd International Conference on Application-specific Systems …, 2021 | 27 | 2021 |
| Software/hardware co-design for multi-modal multi-task learning in autonomous systems C Hao, D Chen 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021 | 25 | 2021 |
Deming ChenAbel Bliss Professor. University of Illinois at Urbana-Champaign在 illinois.edu 的电子邮件经过验证
