Loop parallelization algorithms: From parallelism extraction to code generation P Boulet, A Darte, GA Silber, F Vivien Parallel Computing 24 (3-4), 421-444, 1998 | 133 | 1998 |
(Pen)-ultimate tiling? P Boulet, A Darte, T Risset, Y Robert Integration 17 (1), 33-51, 1994 | 110 | 1994 |
Array-OL revisited, multidimensional intensive signal processing specification P Boulet INRIA, 2007 | 102 | 2007 |
Gaspard2: from MARTE to SystemC simulation É Piel, RB Atitallah, P Marquet, S Meftali, S Niar, A Etien, JL Dekeyser, ... proc. of the DATE 8, 2008 | 68 | 2008 |
Algorithmic issues on heterogeneous computing platforms P Boulet, J Dongarra, F Rastello, Y Robert, F Vivien Parallel processing letters 9 (02), 197-213, 1999 | 67 | 1999 |
MDA for SoC Design, Intensive Signal Processing Experiment. P Boulet, JL Dekeyser, C Dumoulin, P Marquet FDL, 309-317, 2003 | 64 | 2003 |
Static tiling for heterogeneous computing platforms P Boulet, J Dongarra, Y Robert, F Vivien Parallel Computing 25 (5), 547-568, 1999 | 59 | 1999 |
Scanning polyhedra without Do-loops P Boulet, P Feautrier Proceedings. 1998 International Conference on Parallel Architectures and …, 1998 | 59 | 1998 |
Evaluation of modeling tools adaptation A El Kouhen, C Dumoulin, S Gerard, P Boulet | 52 | 2012 |
Multi-layered spiking neural network with target timestamp threshold adaptation and stdp P Falez, P Tirilly, IM Bilasco, P Devienne, P Boulet 2019 International Joint Conference on Neural Networks (IJCNN), 1-8, 2019 | 50 | 2019 |
Mode-automata based methodology for scade O Labbani, JL Dekeyser, P Boulet Hybrid Systems: Computation and Control: 8th International Workshop, HSCC …, 2005 | 43 | 2005 |
Introducing control in the gaspard2 data-parallel metamodel: Synchronous approach O Labbani, JL Dekeyser, P Boulet, É Rutten International Workshop MARTES: Modeling and Analysis of Real-Time and …, 2005 | 41 | 2005 |
Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives IR Quadri, A Gamatié, P Boulet, S Meftali, JL Dekeyser Journal of systems architecture 58 (5), 178-194, 2012 | 40 | 2012 |
Another multidimensional synchronous dataflow: Simulating Array-OL in ptolemy II P Dumont, P Boulet INRIA, 2005 | 38 | 2005 |
Model driven engineering for SoC co-design J Dekeyser, P Boulet, P Marquet, S Meftali The 3rd International IEEE-NEWCAS Conference, 2005., 21-25, 2005 | 37 | 2005 |
Array-OL with delays, a domain specific specification language for multidimensional intensive signal processing C Glitia, P Dumont, P Boulet Multidimensional Systems and Signal Processing 21, 105-131, 2010 | 36 | 2010 |
Projection of the Array-OL specification language onto the Kahn process network computation model A Amar, P Boulet, P Dumont 8th International Symposium on Parallel Architectures, Algorithms and …, 2005 | 36 | 2005 |
Mapping Real Time Applications on NoC Architecture with Hybrid Multi-objective PSO Algorithm A Benyamina, B Beldjilali, S Eltar, K Dellal | 35 | 2010 |
Formal semantics of Array-OL, a domain specific language for intensive multidimensional signal processing P Boulet INRIA, 2008 | 35 | 2008 |
Unsupervised visual feature learning with spike-timing-dependent plasticity: How far are we from traditional feature learning approaches? P Falez, P Tirilly, IM Bilasco, P Devienne, P Boulet Pattern Recognition 93, 418-429, 2019 | 32 | 2019 |