A durable and energy efficient main memory using phase change memory technology P Zhou, B Zhao, J Yang, Y Zhang ACM SIGARCH computer architecture news 37 (3), 14-23, 2009 | 1210 | 2009 |
Phase-change technology and the future of main memory BC Lee, P Zhou, J Yang, Y Zhang, B Zhao, E Ipek, O Mutlu, D Burger IEEE micro 30 (1), 143-143, 2010 | 581 | 2010 |
Energy reduction for STT-RAM using early write termination P Zhou, B Zhao, J Yang, Y Zhang 2009 IEEE/ACM International Conference on Computer-Aided Design-Digest of …, 2009 | 422 | 2009 |
Improving write operations in MLC phase change memory L Jiang, B Zhao, Y Zhang, J Yang, BR Childers IEEE International Symposium on High-Performance Comp Architecture, 1-10, 2012 | 220 | 2012 |
A low-radix and low-diameter 3D interconnection network design Y Xu, Y Du, B Zhao, X Zhou, Y Zhang, J Yang 2009 IEEE 15th International Symposium on High Performance Computer …, 2009 | 114 | 2009 |
Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors L Jiang, B Zhao, Y Zhang, J Yang Proceedings of the 49th Annual Design Automation Conference, 907-912, 2012 | 95 | 2012 |
Simple virtual channel allocation for high throughput and high frequency on-chip routers Y Xu, B Zhao, Y Zhang, J Yang HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010 | 72 | 2010 |
Frequent value compression in packet-based NoC architectures P Zhou, B Zhao, Y Du, Y Xu, Y Zhang, J Yang, L Zhao 2009 Asia and South Pacific Design Automation Conference, 13-18, 2009 | 40 | 2009 |
A low power and reliable charge pump design for phase change memories L Jiang, B Zhao, J Yang, Y Zhang Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on …, 2014 | 38 | 2014 |
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor B Zhao, Y Du, Y Zhang, J Yang Proceedings of the 42nd Annual IEEE/ACM international Symposium on …, 2009 | 37 | 2009 |
Throughput enhancement for phase change memories P Zhou, B Zhao, J Yang, Y Zhang IEEE Transactions on Computers 63 (8), 2080-2093, 2013 | 29 | 2013 |
Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor B Zhao, Y Du, J Yang, Y Zhang IEEE Transactions on Computers 62 (11), 2252-2265, 2013 | 23 | 2013 |
Architecting a common-source-line array for bipolar non-volatile memory devices B Zhao, J Yang, Y Zhang, Y Chen, H Li 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012 | 19 | 2012 |
A speculative arbiter design to enable high-frequency many-VC router in NoCs B Zhao, Y Zhang, J Yang 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 1-8, 2013 | 18 | 2013 |
Hardware-assisted cooperative integration of wear-leveling and salvaging for phase change memory L Jiang, Y Du, B Zhao, Y Zhang, BR Childers, J Yang ACM Transactions on Architecture and Code Optimization (TACO) 10 (2), 1-25, 2013 | 16 | 2013 |
Improving phase change memory (PCM) and spin-torque-transfer magnetic-RAM (STT-MRAM) as next-generation memories: a circuit perspective B Zhao University of Pittsburgh, 2013 | 8 | 2013 |
Common-source-line array: An area efficient memory architecture for bipolar nonvolatile devices B Zhao, J Yang, Y Zhang, Y Chen, H Li ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (4 …, 2013 | 7 | 2013 |
Constructing large and fast on-chip cache for mobile processors with multilevel cell STT-MRAM technology L Jiang, B Zhao, J Yang, Y Zhang ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (4 …, 2015 | 4 | 2015 |
Simple virtual channel allocation for high-throughput and high-frequency on-chip routers Y Xu, B Zhao, Y Zhang, J Yang ACM Transactions on Parallel Computing (TOPC) 2 (1), 1-23, 2015 | 4 | 2015 |
MRAC: A Memristor-based Reconfigurable Framework for Adaptive Cache Replacement P Zhou, B Zhao, Y Zhang, J Yang, Y Chen 2011 International Conference on Parallel Architectures and Compilation …, 2011 | 2 | 2011 |