Design and evaluation of ZMesh topology for on-chip interconnection networks N Prasad, P Mukherjee, S Chattopadhyay, I Chakrabarti Journal of Parallel and Distributed Computing 113, 17-36, 2018 | 36 | 2018 |
Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform N Chatterjee, S Paul, P Mukherjee, S Chattopadhyay Journal of Systems Architecture 74, 61-77, 2017 | 34 | 2017 |
Thermal-aware Application Mapping Strategy for Network-on-Chip based System Design K Manna, P Mukherjee, S Chattopadhyay, I Sengupta IEEE Transactions on Computers, 2017 | 33 | 2017 |
Reliability-aware application mapping onto mesh based Network-on-Chip N Chatterjee, P Mukherjee, S Chattopadhyay Integration 62, 92-113, 2018 | 22 | 2018 |
Design of an NoC with on-chip photonic interconnects using adaptive CDMA links S Poddar, P Ghosal, P Mukherjee, S Samui, H Rahaman SOC Conference (SOCC), 2012 IEEE International, 352-357, 2012 | 10 | 2012 |
Low Power Low Latency Floorplan‐aware Path Synthesis in Application-Specific Network-on-Chip Design P Mukherjee, S Chattopadhyay Integration, the VLSI Journal 58, 167-188, 2017 | 7 | 2017 |
A strategy for fault tolerant reconfigurable Network-on-Chip design N Chatterjee, P Mukherjee, S Chattopadhyay VLSI Design and Test (VDAT), 2016 20th International Symposium on, 1-2, 2016 | 5 | 2016 |
Area Constrained Performance Optimized ASNoC Synthesis with Thermal‐aware White Space Allocation and Redistribution P Mukherjee, S D'souza, S Chattopadhyay Integration, the VLSI Journal 60, 167-189, 2018 | 4 | 2018 |
Thermal-aware detour routing in 3D NoCs P Mukherjee, N Chatterjee, S Chattopadhyay Journal of Parallel and Distributed Computing, 2020 | 3 | 2020 |
Thermal-aware task allocation and scheduling for periodic real-time applications in mesh-based heterogeneous NoCs P Mukherjee, K Jain, S Chattopadhyay Real-Time Systems, 1-36, 2019 | 2 | 2019 |
An ILP-based floorplan-aware path synthesis technique for Application-Specific NoC design P Mukherjee, S Chattopadhyay Recent Advances in Information Technology (RAIT), 2016 3rd International …, 2016 | 1 | 2016 |
An Area and Power Efficient Dynamic TDMA Based Photonic Network on Chip S Poddar, P Ghosal, P Mukherjee, S Samui, H Rahaman Electronic System Design (ISED), 2013 International Symposium on, 113-117, 2013 | 1 | 2013 |
A Photonic Network on Chip with CDMA Links S Poddar, P Ghosal, P Mukherjee, S Samui, H Rahaman 16th International Symposium, VDAT 2012 7373, 377-378, 2012 | 1 | 2012 |