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Adam Teman
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A 250 mV 8 kb 40 nm ultra-low power 9T supply feedback SRAM (SF-SRAM)
A Teman, L Pergament, O Cohen, A Fish
IEEE Journal of Solid-State Circuits 46 (11), 2713-2726, 2011
1422011
A 588-Gb/s LDPC decoder based on finite-alphabet message passing
R Ghanaatian, A Balatsoukas-Stimming, TC Müller, M Meidlinger, G Matz, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (2), 329-340, 2017
812017
Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster
D Rossi, A Pullini, I Loi, M Gautschi, FK Gürkaynak, A Teman, ...
IEEE Micro 37 (5), 20-31, 2017
722017
Power, area, and performance optimization of standard cell memory arrays through controlled placement
A Teman, D Rossi, P Meinerzhagen, L Benini, A Burg
ACM Transactions on Design Automation of Electronic Systems (TODAES) 21 (4 …, 2016
722016
Digital subthreshold logic design-motivation and challenges
S Fisher, A Teman, D Vaysman, A Gertsman, O Yadid-Pecht, A Fish
2008 IEEE 25th Convention of Electrical and Electronics Engineers in Israel …, 2008
572008
A Low-Voltage Radiation-Hardened 13T SRAM Bitcell for Ultralow Power Space Applications
L Atias, A Teman, R Giterman, P Meinerzhagen, A Fish
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (8 …, 2016
562016
Single-supply 3T gain-cell for low-voltage low-power applications
R Giterman, A Teman, P Meinerzhagen, L Atias, A Burg, A Fish
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (1), 358-362, 2015
542015
Exploration of Sub-VT and Near-VT 2T Gain-Cell Memories for Ultra-Low Power Applications under Technology Scaling
P Meinerzhagen, A Teman, R Giterman, A Burg, A Fish
Journal of Low Power Electronics and Applications 3 (2), 54-72, 2013
502013
An 800-MHz Mixed- 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications
R Giterman, A Fish, N Geuli, E Mentovich, A Burg, A Teman
IEEE Journal of Solid-State Circuits 53 (7), 2136-2148, 2018
492018
A 4-transistor nMOS-only logic-compatible gain-cell embedded DRAM with over 1.6-ms retention time at 700 mV in 28-nm FD-SOI
R Giterman, A Fish, A Burg, A Teman
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (4), 1245-1256, 2017
492017
193 MOPS/mW@ 162 MOPS, 0.32 V to 1.15 V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing
D Rossi, A Pullini, I Loi, M Gautschi, FK Gurkaynak, A Teman, ...
Low-Power and High-Speed Chips (COOL CHIPS XIX), 2016 IEEE Symposium in, 1-3, 2016
492016
Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip
P Meinerzhagen, A Teman, R Giterman, N Edri, A Burg, A Fish
Springer International Publishing, 2017
452017
Mitigating the Impact of Faults in Unreliable Memories For Error-Resilient Applications
S Ganapathy, G Karakonstantis, A Teman, A Burg
Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE, 1-6, 2015
442015
Review and classification of gain cell eDRAM implementations
A Teman, P Meinerzhagen, A Burg, A Fish
2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, 1-5, 2012
432012
A Low-Power Low-Cost 24 GHz RFID Tag With a C-Flash Based Embedded Memory
H Dagan, A Shapira, A Teman, A Mordakhay, S Jameson, E Pikhay, ...
Solid-State Circuits, IEEE Journal of, 1-16, 2014
402014
Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications
R Giterman, L Atias, A Teman
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (2), 502-509, 2017
382017
Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI
A Teman, D Rossi, P Meinerzhagen, L Benini, A Burg
The 20th Asia and South Pacific Design Automation Conference, 81-86, 2015
372015
Replica Technique for Adaptive Refresh Timing of Gain-Cell-Embedded DRAM
A Teman, P Meinerzhagen, R Giterman, A Fish, A Burg
Circuits and Systems II: Express Briefs, IEEE Transactions on 61 (4), 259-263, 2014
342014
A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability
A Teman, A Mordakhay, J Mezhibovsky, A Fish
Circuits and Systems II: Express Briefs, IEEE Transactions on 59 (12), 873-877, 2012
342012
Ultra low power memory cell with a supply feedback loop configured for minimal leakage operation
A Teman, L Pergament, O Cohen, A Fish
US Patent US8773895B2, 2013
31*2013
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