Learning the sparsity for ReRAM: Mapping and pruning sparse neural network for ReRAM based accelerator J Lin, Z Zhu, Y Wang, Y Xie Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 69 | 2019 |
Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method Z Zhu, J Lin, M Cheng, L Xia, H Sun, X Chen, Y Wang, H Yang 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 42 | 2018 |
INSPIRE: in-storage private information retrieval via protocol and architecture co-design J Lin, L Liang, Z Qu, I Ahmad, L Liu, F Tu, T Gupta, Y Ding, Y Xie Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 18 | 2022 |
Improving streaming graph processing performance using input knowledge A Basak, Z Qu, J Lin, AR Alameldeen, Z Chishti, Y Ding, Y Xie MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 15 | 2021 |
Saga-bench: Software and hardware characterization of streaming graph analytics workloads A Basak, J Lin, R Lorica, X Xie, Z Chishti, A Alameldeen, Y Xie 2020 IEEE International Symposium on Performance Analysis of Systems and …, 2020 | 14 | 2020 |
Rescuing memristor-based computing with non-linear resistance levels J Lin, L Xia, Z Zhu, H Sun, Y Cai, H Gao, M Cheng, X Chen, Y Wang, ... 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 407-412, 2018 | 14 | 2018 |
Rescuing rram-based computing from static and dynamic faults J Lin, CD Wen, X Hu, T Tang, C Lin, Y Wang, Y Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 12 | 2020 |
ENMC: Extreme Near-Memory Classification via Approximate Screening L Liu*, J Lin*, Z Qu, Y Ding, Y Xie MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 9 | 2021 |
CNNWire: Boosting convolutional neural network with winograd on ReRAM based accelerators J Lin, S Li, X Hu, L Deng, Y Xie Proceedings of the 2019 on Great Lakes Symposium on VLSI, 283-286, 2019 | 8 | 2019 |
Hardware-enabled efficient data processing with tensor-train decomposition Z Qu, L Deng, B Wang, H Chen, J Lin, L Liang, G Li, Z Zhang, Y Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 6 | 2021 |
Overcoming the Memory Hierarchy Inefficiencies in Graph Processing Applications J Lin, S Li, D Yufei, X Yuan 2021 International Conference on Computer Aided Design, 2021 | 5 | 2021 |
Ecssd: Hardware/data layout co-designed in-storage-computing architecture for extreme classification S Li, F Tu, L Liu, J Lin, Z Wang, Y Kang, Y Ding, Y Xie Proceedings of the 50th Annual International Symposium on Computer …, 2023 | 4 | 2023 |
Spg: Structure-private graph database via squeezepir L Liang, J Lin, Z Qu, I Ahmad, F Tu, T Gupta, Y Ding, Y Xie Proceedings of the VLDB Endowment 16 (7), 2023 | 3 | 2023 |
Processing accelerator architectures LIN Jilan, D Niu, S Li, H Zheng, Y Xie US Patent 11,409,684, 2022 | 2 | 2022 |
System and method for memory management LIN Jilan, S Li, D Niu, H Zheng US Patent 11,544,189, 2023 | 1 | 2023 |
Narrow DRAM channel systems and methods LIN Jilan, D Niu, S Li, H Zheng, Y Xie US Patent 11,625,341, 2023 | | 2023 |
Processing accelerator architectures LIN Jilan, D Niu, S Li, H Zheng, Y Xie US Patent App. 17/789,055, 2023 | | 2023 |
Memory-Centric Architectures for Big Data Applications J Lin University of California, Santa Barbara, 2022 | | 2022 |
ISPASS 2020 A Basak, J Lin, G Jha, EB John | | |