| Analyzing area and performance penalty of protecting different digital modules with Hamming code and triple modular redundancy R Hentschke, F Marques, F Lima, L Carro, A Susin, R Reis Proceedings. 15th Symposium on Integrated Circuits and Systems Design, 95-100, 2002 | 155 | 2002 |
| DAG based library-free technology mapping FS Marques, LS Rosa Jr, RP Ribas, SS Sapatnekar, AI Reis Proceedings of the 17th ACM Great Lakes symposium on VLSI, 293-298, 2007 | 47 | 2007 |
| KL-cuts: a new approach for logic synthesis targeting multiple output blocks O Martinello, FS Marques, RP Ribas, AI Reis 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 42 | 2010 |
| Graph-based transistor network generation method for supergate design VN Possani, V Callegaro, AI Reis, RP Ribas, F de Souza Marques, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 692-705, 2015 | 41 | 2015 |
| Fast disjoint transistor networks from BDDs LS da Rosa Junior, FS Marques, TMG Cardoso, RP Ribas, ... Proceedings of the 19th annual symposium on Integrated circuits and systems …, 2006 | 27 | 2006 |
| An overview on the production of synthetic fuels from biogas RL da Silva Pinto, AC Vieira, A Scarpetta, FS Marques, RMM Jorge, A Bail, ... Bioresource Technology Reports 18, 101104, 2022 | 23 | 2022 |
| Analysis of the socio-economic feasibility of the implementation of an agro-energy condominium in western Paraná–Brazil C de Almeida, RA Bariccatti, LM Frare, CEC Nogueira, AA Mondardo, ... Renewable and Sustainable Energy Reviews 75, 601-608, 2017 | 23 | 2017 |
| A comparative study of CMOS gates with minimum transistor stacks LS da Rosa, AI Reis, RP Ribas, FS Marques, FR Schneider Proceedings of the 20th annual conference on Integrated circuits and systems …, 2007 | 21 | 2007 |
| SwitchCraft: a framework for transistor network design V Callegaro, FS Marques, CE Klock, LS da Rosa Jr, RP Ribas, AI Reis Proceedings of the 23rd symposium on Integrated circuits and system design …, 2010 | 20 | 2010 |
| DRAPS: A design rule aware path search algorithm for detailed routing SMM Gonçalves, LS Rosa, FS Marques IEEE Transactions on Circuits and Systems II: Express Briefs 67 (7), 1239-1243, 2019 | 19 | 2019 |
| A new approach to the use of satisfiability in false path detection FS Marques, RP Ribas, S Sapatnekar, AI Reis Proceedings of the 15th ACM Great Lakes symposium on VLSI, 308-311, 2005 | 17 | 2005 |
| Optimizing transistor networks using a graph-based technique VN Possani, RS de Souza, JS Domingues, LV Agostini, FS Marques, ... Analog Integrated Circuits and Signal Processing 73, 841-850, 2012 | 16 | 2012 |
| Performance and energy consumption analysis of embedded applications based on android platform A Vieira, D Debastiani, L Agostini, F Marques, JCB Mattos 2012 Brazilian Symposium on Computing System Engineering, 59-64, 2012 | 15 | 2012 |
| Moisture content monitoring in industrial-scale composting systems using low-cost sensor-based machine learning techniques PCS Moncks, ÉK Corrêa, LLC Guidoni, RB Moncks, LB Corrêa, T Lucia Jr, ... Bioresource Technology 359, 127456, 2022 | 14 | 2022 |
| An improved heuristic function for a∗-based path search in detailed routing SMM Gonçalves, LS da Rosa, FS Marques 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 12 | 2019 |
| A survey of path search algorithms for VLSI detailed routing SMM Gonçalves, LS da Rosa, FS Marques 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 12 | 2017 |
| Estudo genético-quantitativo de características de crescimento na raça Tabapuã SHA Ribeiro, JCC Pereira, RS Verneque, MA Silva, JAG Bergmann, ... Arquivo Brasileiro de Medicina Veterinária e Zootecnia 59, 473-480, 2007 | 11 | 2007 |
| Libra: An automatic design methodology for CMOS complex gates MS Cardoso, GH Smaniotto, AAO Bubolz, MT Moreira, LS da Rosa, ... IEEE Transactions on Circuits and Systems II: Express Briefs 65 (10), 1345-1349, 2018 | 9 | 2018 |
| Análise da autodepuração do curso d’água Pomba Cuê utilizando o modelo Streeter Phelps EH de Vargas, FS Marques Revista Pleiade 9 (17), 83-92, 2015 | 8 | 2015 |
| Improving the methodology to build non-series-parallel transistor arrangements VN Possani, V Callegaro, AI Reis, RP Ribas, FS Marques, LS da Rosa 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013 | 7 | 2013 |
Leomar Soares da Rosa JuniorProfessor de Computação, Universidade Federal de Pelotas在 inf.ufpel.edu.br 的电子邮件经过验证
